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Message-ID: <5b3e7b59-5853-a466-11de-22ef6e80b0d6@foss.st.com>
Date:   Mon, 13 Jun 2022 09:39:47 +0200
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Subject: Re: [PATCH 2/2] ARM: dts: stm32: remove the IPCC "wakeup" IRQ on
 stm32mp151
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To:     Fabien Dessenne <fabien.dessenne@foss.st.com>,
        Rob Herring <robh+dt@kernel.org>,
        Jassi Brar <jassisinghbrar@gmail.com>,
        Maxime Coquelin <mcoquelin.stm32@gmail.com>,
        <linux-kernel@vger.kernel.org>,
        <linux-stm32@st-md-mailman.stormreply.com>,
        <linux-arm-kernel@lists.infradead.org>,
        <devicetree@vger.kernel.org>
References: <20220503145606.525875-1-fabien.dessenne@foss.st.com>
From:   Alexandre TORGUE <alexandre.torgue@foss.st.com>
In-Reply-To: <20220503145606.525875-1-fabien.dessenne@foss.st.com>
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Hi Fabien

On 5/3/22 16:56, Fabien Dessenne wrote:
> The stm32 ipcc mailbox driver supports only two interrupts (rx and tx), so
> remove the unsupported "wakeup" one.
> Note that the EXTI interrupt 61 has two roles : it is hierarchically linked
> to the GIC IPCC "rx" interrupt, and it acts as a wakeup source.
> 
> Signed-off-by: Fabien Dessenne <fabien.dessenne@foss.st.com>
> ---
>   arch/arm/boot/dts/stm32mp151.dtsi | 7 +++----
>   1 file changed, 3 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/stm32mp151.dtsi b/arch/arm/boot/dts/stm32mp151.dtsi
> index 7fdc324b3cf9..edc0a1641c7b 100644
> --- a/arch/arm/boot/dts/stm32mp151.dtsi
> +++ b/arch/arm/boot/dts/stm32mp151.dtsi
> @@ -1117,10 +1117,9 @@ ipcc: mailbox@4c001000 {
>   			reg = <0x4c001000 0x400>;
>   			st,proc-id = <0>;
>   			interrupts-extended =
> -				<&intc GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
> -				<&intc GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
> -				<&exti 61 1>;
> -			interrupt-names = "rx", "tx", "wakeup";
> +				<&exti 61 1>,
> +				<&intc GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "rx", "tx";
>   			clocks = <&rcc IPCC>;
>   			wakeup-source;
>   			status = "disabled";

Applied on stm32-next.

Thanks.
Alex