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[31.30.173.67]) by smtp.gmail.com with ESMTPSA id 7-20020a170906328700b006f3ef214db7sm1810644ejw.29.2022.06.17.00.28.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 17 Jun 2022 00:28:02 -0700 (PDT) Date: Fri, 17 Jun 2022 09:28:00 +0200 From: Andrew Jones To: David Laight Cc: "'oliver.upton@linux.dev'" , Raghavendra Rao Ananta , Marc Zyngier , James Morse , Alexandru Elisei , Suzuki K Poulose , Paolo Bonzini , Catalin Marinas , Will Deacon , Peter Shier , Ricardo Koller , Oliver Upton , Reiji Watanabe , Jing Zhang , Colton Lewis , "linux-arm-kernel@lists.infradead.org" , "kvmarm@lists.cs.columbia.edu" , "linux-kernel@vger.kernel.org" , "kvm@vger.kernel.org" , "linux-kselftest@vger.kernel.org" Subject: Re: [PATCH] selftests: KVM: Handle compiler optimizations in ucall Message-ID: <20220617072800.cvqb4wmafxdi3knq@gator> References: <3e73cb07968d4c92b797781b037c2d45@AcuMS.aculab.com> <20220615185706.1099208-1-rananta@google.com> <20220616120232.ctkekviusrozqpru@gator> <33ca91aeb5254831a88e187ff8d9a2c2@AcuMS.aculab.com> <20220616162557.55bopzfa6glusuh5@gator> <7b1040c48bc9b2986798322c336660ab@linux.dev> <2ec9ecbfb13d422ab6cda355ff011c9f@AcuMS.aculab.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <2ec9ecbfb13d422ab6cda355ff011c9f@AcuMS.aculab.com> X-Spam-Status: No, score=-3.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_LOW, SPF_HELO_NONE,SPF_NONE,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Jun 16, 2022 at 09:54:16PM +0000, David Laight wrote: > From: oliver.upton@linux.dev > > Sent: 16 June 2022 19:45 > > > > > June 16, 2022 11:48 AM, "David Laight" wrote: > > > No wonder I was confused. > > > It's not surprising the compiler optimises it all away. > > > > > > It doesn't seem right to be 'abusing' WRITE_ONCE() here. > > > Just adding barrier() should be enough and much more descriptive. > > > > I had the same thought, although I do not believe barrier() is sufficient > > on its own. barrier_data() with a pointer to uc passed through > > is required to keep clang from eliminating the dead store. > > A barrier() (full memory clobber) ought to be stronger than > the partial one than barrier_data() generates. > > I can't quite decide whether you need a barrier() both sides > of the 'magic write'. > Plausibly the compiler could discard the on-stack data > after the barrier() and before the 'magic write'. > > Certainly putting the 'magic write' inside a asm block > that has a memory clobber is a more correct solution. Indeed, since the magic write is actually a guest MMIO write, then it should be using writeq(). Thanks, drew