Received: by 2002:a6b:fb09:0:0:0:0:0 with SMTP id h9csp192941iog; Fri, 17 Jun 2022 01:38:04 -0700 (PDT) X-Google-Smtp-Source: AGRyM1uWD0bOwL+Yradt2s3PYszkB4B8ieix8p4pKT4+wZiTM43TgmmNJqR9tm2nNbOC/rZU/ZWs X-Received: by 2002:a17:906:7007:b0:6ff:8028:42e with SMTP id n7-20020a170906700700b006ff8028042emr7747059ejj.278.1655455083968; Fri, 17 Jun 2022 01:38:03 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1655455083; cv=none; d=google.com; s=arc-20160816; b=p4k72Y4BIdO3Osw/hZTmn0+68zO4grPO3LZIUSioeMZPN5rO4jlgV4LrEel2EX+OSj 6MMmZI60jH9KG7cmUTRhQfDCNI4GxOGcBzc9wWFTAQFN9E3hts9GsA5H+KfJQOXEQZIM erIrLW9CT76auhXSKwBuVVLevfb/rIBO1FyYT9mPqBl7U67NxQQPWs0mzMB5matjYl1j eWhXLU1EfnOGZFg8Vrjd4O1QAJKIJjXUyBOjbWzstN9ngzEu1Sv+MUQoIoVNPsA4KFTp mPDMbiB2zG+x2IygvMkTaM0DZ6HIVR9XUD3YMjPkTx3EoTcHn+xPy9ayC0RR+xBndbxD QyKw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:in-reply-to:content-disposition:mime-version :references:message-id:subject:cc:to:from:date; bh=H3OB4jEQtrIBMsBArQr3LflUUbFQmzGDnxD2FrLkPDQ=; b=z/IvlIY78geGy7VdrA5dUbPSqzh8N84TajNwxF0mGRf/llolwJGm8uF/mxwzUc7K93 N7EZpqPaWvp41bWwJHEYZp6mmM191VLVpIoeW7PkplK7tsAZt9lBhjAac/oj39uH1WmO tg2+llNcddZolnyFoIy850ozAQx5xLAr7jj+W+SFIS1O1G+PsPv59rwi5F26XLTORJb1 QLYYQWeFYt+xoYUUz5f4l4OcTtMziLE3ygJKeV83w/vS87owJHxR3sKWmJ6mGjg+olYV Gb5zGG66dQKArToteF/wctrE+k7E8sLgzxlxnQv0avYejrKv2rcA8L3Qo/M5S6IYkrqt 7/UQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Return-Path: Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id u23-20020a1709060b1700b00702d7a823casi3565788ejg.317.2022.06.17.01.37.12; Fri, 17 Jun 2022 01:38:03 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1380897AbiFQIYF (ORCPT + 99 others); Fri, 17 Jun 2022 04:24:05 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33942 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1380867AbiFQIYD (ORCPT ); Fri, 17 Jun 2022 04:24:03 -0400 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 59F6764D08 for ; Fri, 17 Jun 2022 01:24:02 -0700 (PDT) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 0A3DD12FC; Fri, 17 Jun 2022 01:24:02 -0700 (PDT) Received: from FVFF77S0Q05N (unknown [10.57.39.168]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 78B383F792; Fri, 17 Jun 2022 01:23:58 -0700 (PDT) Date: Fri, 17 Jun 2022 09:23:50 +0100 From: Mark Rutland To: Tong Tiangen Cc: James Morse , Andrew Morton , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Robin Murphy , Dave Hansen , Catalin Marinas , Will Deacon , Alexander Viro , Michael Ellerman , Benjamin Herrenschmidt , Paul Mackerras , x86@kernel.org, "H . Peter Anvin" , linuxppc-dev@lists.ozlabs.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mm@kvack.org, Kefeng Wang , Xie XiuQi , Guohanjun Subject: Re: [PATCH -next v5 1/8] arm64: extable: add new extable type EX_TYPE_KACCESS_ERR_ZERO support Message-ID: References: <20220528065056.1034168-1-tongtiangen@huawei.com> <20220528065056.1034168-2-tongtiangen@huawei.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20220528065056.1034168-2-tongtiangen@huawei.com> X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_NONE,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sat, May 28, 2022 at 06:50:49AM +0000, Tong Tiangen wrote: > Currently, The extable type EX_TYPE_UACCESS_ERR_ZERO is used by > __get/put_kernel_nofault(), but those helpers are not uaccess type, so we > add a new extable type EX_TYPE_KACCESS_ERR_ZERO which can be used by > __get/put_kernel_no_fault(). > > This is also to prepare for distinguishing the two types in machine check > safe process. > > Suggested-by: Mark Rutland > Signed-off-by: Tong Tiangen This looks good to me, so modulo one nit below: Acked-by: Mark Rutland > --- > arch/arm64/include/asm/asm-extable.h | 13 ++++ > arch/arm64/include/asm/uaccess.h | 94 ++++++++++++++-------------- > arch/arm64/mm/extable.c | 1 + > 3 files changed, 61 insertions(+), 47 deletions(-) > > diff --git a/arch/arm64/include/asm/asm-extable.h b/arch/arm64/include/asm/asm-extable.h > index c39f2437e08e..56ebe183e78b 100644 > --- a/arch/arm64/include/asm/asm-extable.h > +++ b/arch/arm64/include/asm/asm-extable.h > @@ -7,6 +7,7 @@ > #define EX_TYPE_BPF 2 > #define EX_TYPE_UACCESS_ERR_ZERO 3 > #define EX_TYPE_LOAD_UNALIGNED_ZEROPAD 4 > +#define EX_TYPE_KACCESS_ERR_ZERO 5 Could we please renumber this so the UACCESS and KACCESS definitions are next to one another, i.e. #define EX_TYPE_BPF 2 #define EX_TYPE_UACCESS_ERR_ZERO 3 #define EX_TYPE_KACCESS_ERR_ZERO 4 #define EX_TYPE_LOAD_UNALIGNED_ZEROPAD 5 Thanks, Mark. > > #ifdef __ASSEMBLY__ > > @@ -73,9 +74,21 @@ > EX_DATA_REG(ZERO, zero) \ > ")") > > +#define _ASM_EXTABLE_KACCESS_ERR_ZERO(insn, fixup, err, zero) \ > + __DEFINE_ASM_GPR_NUMS \ > + __ASM_EXTABLE_RAW(#insn, #fixup, \ > + __stringify(EX_TYPE_KACCESS_ERR_ZERO), \ > + "(" \ > + EX_DATA_REG(ERR, err) " | " \ > + EX_DATA_REG(ZERO, zero) \ > + ")") > + > #define _ASM_EXTABLE_UACCESS_ERR(insn, fixup, err) \ > _ASM_EXTABLE_UACCESS_ERR_ZERO(insn, fixup, err, wzr) > > +#define _ASM_EXTABLE_KACCESS_ERR(insn, fixup, err) \ > + _ASM_EXTABLE_KACCESS_ERR_ZERO(insn, fixup, err, wzr) > + > #define EX_DATA_REG_DATA_SHIFT 0 > #define EX_DATA_REG_DATA GENMASK(4, 0) > #define EX_DATA_REG_ADDR_SHIFT 5 > diff --git a/arch/arm64/include/asm/uaccess.h b/arch/arm64/include/asm/uaccess.h > index 63f9c828f1a7..2fc9f0861769 100644 > --- a/arch/arm64/include/asm/uaccess.h > +++ b/arch/arm64/include/asm/uaccess.h > @@ -232,34 +232,34 @@ static inline void __user *__uaccess_mask_ptr(const void __user *ptr) > * The "__xxx_error" versions set the third argument to -EFAULT if an error > * occurs, and leave it unchanged on success. > */ > -#define __get_mem_asm(load, reg, x, addr, err) \ > +#define __get_mem_asm(load, reg, x, addr, err, type) \ > asm volatile( \ > "1: " load " " reg "1, [%2]\n" \ > "2:\n" \ > - _ASM_EXTABLE_UACCESS_ERR_ZERO(1b, 2b, %w0, %w1) \ > + _ASM_EXTABLE_##type##ACCESS_ERR_ZERO(1b, 2b, %w0, %w1) \ > : "+r" (err), "=&r" (x) \ > : "r" (addr)) > > -#define __raw_get_mem(ldr, x, ptr, err) \ > -do { \ > - unsigned long __gu_val; \ > - switch (sizeof(*(ptr))) { \ > - case 1: \ > - __get_mem_asm(ldr "b", "%w", __gu_val, (ptr), (err)); \ > - break; \ > - case 2: \ > - __get_mem_asm(ldr "h", "%w", __gu_val, (ptr), (err)); \ > - break; \ > - case 4: \ > - __get_mem_asm(ldr, "%w", __gu_val, (ptr), (err)); \ > - break; \ > - case 8: \ > - __get_mem_asm(ldr, "%x", __gu_val, (ptr), (err)); \ > - break; \ > - default: \ > - BUILD_BUG(); \ > - } \ > - (x) = (__force __typeof__(*(ptr)))__gu_val; \ > +#define __raw_get_mem(ldr, x, ptr, err, type) \ > +do { \ > + unsigned long __gu_val; \ > + switch (sizeof(*(ptr))) { \ > + case 1: \ > + __get_mem_asm(ldr "b", "%w", __gu_val, (ptr), (err), type); \ > + break; \ > + case 2: \ > + __get_mem_asm(ldr "h", "%w", __gu_val, (ptr), (err), type); \ > + break; \ > + case 4: \ > + __get_mem_asm(ldr, "%w", __gu_val, (ptr), (err), type); \ > + break; \ > + case 8: \ > + __get_mem_asm(ldr, "%x", __gu_val, (ptr), (err), type); \ > + break; \ > + default: \ > + BUILD_BUG(); \ > + } \ > + (x) = (__force __typeof__(*(ptr)))__gu_val; \ > } while (0) > > /* > @@ -274,7 +274,7 @@ do { \ > __chk_user_ptr(ptr); \ > \ > uaccess_ttbr0_enable(); \ > - __raw_get_mem("ldtr", __rgu_val, __rgu_ptr, err); \ > + __raw_get_mem("ldtr", __rgu_val, __rgu_ptr, err, U); \ > uaccess_ttbr0_disable(); \ > \ > (x) = __rgu_val; \ > @@ -314,40 +314,40 @@ do { \ > \ > __uaccess_enable_tco_async(); \ > __raw_get_mem("ldr", *((type *)(__gkn_dst)), \ > - (__force type *)(__gkn_src), __gkn_err); \ > + (__force type *)(__gkn_src), __gkn_err, K); \ > __uaccess_disable_tco_async(); \ > \ > if (unlikely(__gkn_err)) \ > goto err_label; \ > } while (0) > > -#define __put_mem_asm(store, reg, x, addr, err) \ > +#define __put_mem_asm(store, reg, x, addr, err, type) \ > asm volatile( \ > "1: " store " " reg "1, [%2]\n" \ > "2:\n" \ > - _ASM_EXTABLE_UACCESS_ERR(1b, 2b, %w0) \ > + _ASM_EXTABLE_##type##ACCESS_ERR(1b, 2b, %w0) \ > : "+r" (err) \ > : "r" (x), "r" (addr)) > > -#define __raw_put_mem(str, x, ptr, err) \ > -do { \ > - __typeof__(*(ptr)) __pu_val = (x); \ > - switch (sizeof(*(ptr))) { \ > - case 1: \ > - __put_mem_asm(str "b", "%w", __pu_val, (ptr), (err)); \ > - break; \ > - case 2: \ > - __put_mem_asm(str "h", "%w", __pu_val, (ptr), (err)); \ > - break; \ > - case 4: \ > - __put_mem_asm(str, "%w", __pu_val, (ptr), (err)); \ > - break; \ > - case 8: \ > - __put_mem_asm(str, "%x", __pu_val, (ptr), (err)); \ > - break; \ > - default: \ > - BUILD_BUG(); \ > - } \ > +#define __raw_put_mem(str, x, ptr, err, type) \ > +do { \ > + __typeof__(*(ptr)) __pu_val = (x); \ > + switch (sizeof(*(ptr))) { \ > + case 1: \ > + __put_mem_asm(str "b", "%w", __pu_val, (ptr), (err), type); \ > + break; \ > + case 2: \ > + __put_mem_asm(str "h", "%w", __pu_val, (ptr), (err), type); \ > + break; \ > + case 4: \ > + __put_mem_asm(str, "%w", __pu_val, (ptr), (err), type); \ > + break; \ > + case 8: \ > + __put_mem_asm(str, "%x", __pu_val, (ptr), (err), type); \ > + break; \ > + default: \ > + BUILD_BUG(); \ > + } \ > } while (0) > > /* > @@ -362,7 +362,7 @@ do { \ > __chk_user_ptr(__rpu_ptr); \ > \ > uaccess_ttbr0_enable(); \ > - __raw_put_mem("sttr", __rpu_val, __rpu_ptr, err); \ > + __raw_put_mem("sttr", __rpu_val, __rpu_ptr, err, U); \ > uaccess_ttbr0_disable(); \ > } while (0) > > @@ -400,7 +400,7 @@ do { \ > \ > __uaccess_enable_tco_async(); \ > __raw_put_mem("str", *((type *)(__pkn_src)), \ > - (__force type *)(__pkn_dst), __pkn_err); \ > + (__force type *)(__pkn_dst), __pkn_err, K); \ > __uaccess_disable_tco_async(); \ > \ > if (unlikely(__pkn_err)) \ > diff --git a/arch/arm64/mm/extable.c b/arch/arm64/mm/extable.c > index 489455309695..056591e5ca80 100644 > --- a/arch/arm64/mm/extable.c > +++ b/arch/arm64/mm/extable.c > @@ -77,6 +77,7 @@ bool fixup_exception(struct pt_regs *regs) > case EX_TYPE_BPF: > return ex_handler_bpf(ex, regs); > case EX_TYPE_UACCESS_ERR_ZERO: > + case EX_TYPE_KACCESS_ERR_ZERO: > return ex_handler_uaccess_err_zero(ex, regs); > case EX_TYPE_LOAD_UNALIGNED_ZEROPAD: > return ex_handler_load_unaligned_zeropad(ex, regs); > -- > 2.25.1 >