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[76.210.143.223]) by smtp.gmail.com with ESMTPSA id gb13-20020a17090b060d00b001ec86b3f7bfsm162136pjb.24.2022.06.17.14.54.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 17 Jun 2022 14:54:37 -0700 (PDT) Date: Fri, 17 Jun 2022 14:54:37 -0700 (PDT) X-Google-Original-Date: Fri, 17 Jun 2022 14:54:35 PDT (-0700) Subject: Re: [PATCH] riscv: Fix ALT_THEAD_PMA's asm parameters In-Reply-To: CC: Paul Walmsley , aou@eecs.berkeley.edu, ndesaulniers@google.com, heiko@sntech.de, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, llvm@lists.linux.dev, patches@lists.linux.dev, jrtc27@jrtc27.com From: Palmer Dabbelt To: nathan@kernel.org Message-ID: Mime-Version: 1.0 (MHng) Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, 13 Jun 2022 13:26:17 PDT (-0700), nathan@kernel.org wrote: > On Wed, May 25, 2022 at 07:40:37PM -0700, Nathan Chancellor wrote: >> Small ping on this and https://lore.kernel.org/20220516214520.3252074-1-nathan@kernel.org/. >> >> Our builds on -next have been broken for a week now. Hopefully these can >> make the first RISC-V pull request to avoid mainline being broken in the >> same fashion. > > One more small ping. The patch linked above made it into 5.19-rc1 but > this one has not been applied so our builds are still broken. Sorry I dropped the ball on this one, it's in fixes. Thanks! > Cheers, > Nathan > >> On Wed, May 18, 2022 at 11:45:29AM -0700, Nathan Chancellor wrote: >> > After commit a35707c3d850 ("riscv: add memory-type errata for T-Head"), >> > builds with LLVM's integrated assembler fail like: >> > >> > In file included from arch/riscv/kernel/asm-offsets.c:10: >> > In file included from ./include/linux/mm.h:29: >> > In file included from ./include/linux/pgtable.h:6: >> > In file included from ./arch/riscv/include/asm/pgtable.h:114: >> > ./arch/riscv/include/asm/pgtable-64.h:210:2: error: invalid input constraint '0' in asm >> > ALT_THEAD_PMA(prot_val); >> > ^ >> > ./arch/riscv/include/asm/errata_list.h:88:4: note: expanded from macro 'ALT_THEAD_PMA' >> > : "0"(_val), \ >> > ^ >> > >> > This was reported upstream to LLVM where Jessica pointed out a couple of >> > issues with the existing implementation of ALT_THEAD_PMA: >> > >> > * t3 is modified but not listed in the clobbers list. >> > >> > * "+r"(_val) marks _val as both an input and output of the asm but then >> > "0"(_val) marks _val as an input matching constraint, which does not >> > make much sense in this situation, as %1 is not actually used in the >> > asm and matching constraints are designed to be used for different >> > inputs that need to use the same register. >> > >> > Drop the matching contraint and shift all the operands by one, as %1 is >> > unused, and mark t3 as clobbered. This resolves the build error and goes >> > not cause any problems with GNU as. >> > >> > Fixes: a35707c3d850 ("riscv: add memory-type errata for T-Head") >> > Link: https://github.com/ClangBuiltLinux/linux/issues/1641 >> > Link: https://github.com/llvm/llvm-project/issues/55514 >> > Link: https://gcc.gnu.org/onlinedocs/gcc/Simple-Constraints.html >> > Suggested-by: Jessica Clarke >> > Signed-off-by: Nathan Chancellor >> > --- >> > arch/riscv/include/asm/errata_list.h | 14 +++++++------- >> > 1 file changed, 7 insertions(+), 7 deletions(-) >> > >> > diff --git a/arch/riscv/include/asm/errata_list.h b/arch/riscv/include/asm/errata_list.h >> > index 9e2888dbb5b1..416ead0f9a65 100644 >> > --- a/arch/riscv/include/asm/errata_list.h >> > +++ b/arch/riscv/include/asm/errata_list.h >> > @@ -75,20 +75,20 @@ asm volatile(ALTERNATIVE( \ >> > "nop\n\t" \ >> > "nop\n\t" \ >> > "nop", \ >> > - "li t3, %2\n\t" \ >> > - "slli t3, t3, %4\n\t" \ >> > + "li t3, %1\n\t" \ >> > + "slli t3, t3, %3\n\t" \ >> > "and t3, %0, t3\n\t" \ >> > "bne t3, zero, 2f\n\t" \ >> > - "li t3, %3\n\t" \ >> > - "slli t3, t3, %4\n\t" \ >> > + "li t3, %2\n\t" \ >> > + "slli t3, t3, %3\n\t" \ >> > "or %0, %0, t3\n\t" \ >> > "2:", THEAD_VENDOR_ID, \ >> > ERRATA_THEAD_PBMT, CONFIG_ERRATA_THEAD_PBMT) \ >> > : "+r"(_val) \ >> > - : "0"(_val), \ >> > - "I"(_PAGE_MTMASK_THEAD >> ALT_THEAD_PBMT_SHIFT), \ >> > + : "I"(_PAGE_MTMASK_THEAD >> ALT_THEAD_PBMT_SHIFT), \ >> > "I"(_PAGE_PMA_THEAD >> ALT_THEAD_PBMT_SHIFT), \ >> > - "I"(ALT_THEAD_PBMT_SHIFT)) >> > + "I"(ALT_THEAD_PBMT_SHIFT) \ >> > + : "t3") >> > #else >> > #define ALT_THEAD_PMA(_val) >> > #endif >> > >> > base-commit: 93c0651617a62a69717299f1464dda798af8bebb >> > -- >> > 2.36.1 >> > >> > >> > _______________________________________________ >> > linux-riscv mailing list >> > linux-riscv@lists.infradead.org >> > http://lists.infradead.org/mailman/listinfo/linux-riscv >>