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From:   "Zhuo, Qiuxu" <qiuxu.zhuo@intel.com>
To:     "Weiny, Ira" <ira.weiny@intel.com>,
        "Williams, Dan J" <dan.j.williams@intel.com>,
        Bjorn Helgaas <bhelgaas@google.com>,
        "Jonathan Cameron" <Jonathan.Cameron@huawei.com>
CC:     Lukas Wunner <lukas@wunner.de>,
        Davidlohr Bueso <dave@stgolabs.net>,
        "Weiny, Ira" <ira.weiny@intel.com>,
        "Schofield, Alison" <alison.schofield@intel.com>,
        "Verma, Vishal L" <vishal.l.verma@intel.com>,
        "Jiang, Dave" <dave.jiang@intel.com>,
        Ben Widawsky <ben@bwidawsk.net>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        "linux-cxl@vger.kernel.org" <linux-cxl@vger.kernel.org>,
        "linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>
Subject: RE: [PATCH V10 3/9] PCI: Create PCI library functions in support of
 DOE mailboxes.
Thread-Topic: [PATCH V10 3/9] PCI: Create PCI library functions in support of
 DOE mailboxes.
Thread-Index: AQHYeHZt6D1+2ArR30SGV8cAnmJrKK1YCoqw
Date:   Mon, 20 Jun 2022 08:39:45 +0000
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References: <20220605005049.2155874-1-ira.weiny@intel.com>
 <20220605005049.2155874-4-ira.weiny@intel.com>
In-Reply-To: <20220605005049.2155874-4-ira.weiny@intel.com>
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> From: ira.weiny@intel.com <ira.weiny@intel.com>
> Sent: Sunday, June 5, 2022 8:51 AM
> ...
> +static void retire_cur_task(struct pci_doe_mb *doe_mb) {
> +	spin_lock(&doe_mb->task_lock);
> +	doe_mb->cur_task =3D NULL;
> +	spin_unlock(&doe_mb->task_lock);
> +	wake_up_interruptible(&doe_mb->wq);
> +}
> +
> +static void doe_statemachine_work(struct work_struct *work) {
> +	struct delayed_work *w =3D to_delayed_work(work);
> +	struct pci_doe_mb *doe_mb =3D container_of(w, struct pci_doe_mb,
> +						 statemachine);
> +	struct pci_dev *pdev =3D doe_mb->pdev;
> +	int offset =3D doe_mb->cap_offset;
> +	enum pci_doe_state prev_state;
> +	struct pci_doe_task *task;
> +	u32 val;
> +	int rc;
> +
> +	spin_lock(&doe_mb->task_lock);
> +	task =3D doe_mb->cur_task;
> +	spin_unlock(&doe_mb->task_lock);

              I don't think it needs the lock protection here.=20
              No matter "task" is !NULL or NULL, it is checked before it's =
used within this function.

> +
> +	if (test_and_clear_bit(PCI_DOE_FLAG_ABORT, &doe_mb->flags)) {
> +		/*
> +		 * Currently only used during init - care needed if
> +		 * pci_doe_abort() is generally exposed as it would impact
> +		 * queries in flight.
> +		 */
> +		if (task)
> +			pci_err(pdev, "DOE [%x] Aborting with active task!\n",
> +				doe_mb->cap_offset);
> +		doe_mb->state =3D DOE_WAIT_ABORT;
> +		pci_doe_abort_start(doe_mb);
> +		return;
> +	}
> +
> +	switch (doe_mb->state) {
> +	case DOE_IDLE:
> +		if (task =3D=3D NULL)
> +			return;
> +
> +		rc =3D pci_doe_send_req(doe_mb, task);
> +
> +		/*
> +		 * The specification does not provide any guidance on how
> long
> +		 * some other entity could keep the DOE busy, so try for 1
> +		 * second then fail. Busy handling is best effort only, because
> +		 * there is no way of avoiding racing against another user of
> +		 * the DOE.
> +		 */
> +		if (rc =3D=3D -EBUSY) {
> +			doe_mb->busy_retries++;
> +			if (doe_mb->busy_retries =3D=3D
> PCI_DOE_BUSY_MAX_RETRIES) {
> +				/* Long enough, fail this request */
> +				pci_warn(pdev,
> +					"DOE [%x] busy for too long (> 1
> sec)\n",
> +					doe_mb->cap_offset);
> +				doe_mb->busy_retries =3D 0;
> +				goto err_busy;
> +			}
> +			schedule_delayed_work(w, HZ /
> PCI_DOE_BUSY_MAX_RETRIES);
> +			return;
> +		}
> +		if (rc)
> +			goto err_abort;
> +		doe_mb->busy_retries =3D 0;
> +
> +		doe_mb->state =3D DOE_WAIT_RESP;
> +		doe_mb->timeout_jiffies =3D jiffies + HZ;
> +		/* Now poll or wait for IRQ with timeout */
> +		if (doe_mb->irq >=3D 0)
> +			schedule_delayed_work(w, PCI_DOE_TIMEOUT);
> +		else
> +			schedule_delayed_work(w, PCI_DOE_POLL_INTERVAL);
> +		return;
> +
> +	case DOE_WAIT_RESP:
> +		/* Not possible to get here with NULL task */
> +		pci_read_config_dword(pdev, offset + PCI_DOE_STATUS,
> &val);
> +		if (FIELD_GET(PCI_DOE_STATUS_ERROR, val)) {
> +			rc =3D -EIO;
> +			goto err_abort;
> +		}
> +
> +		if (!FIELD_GET(PCI_DOE_STATUS_DATA_OBJECT_READY, val))
> {
> +			/* If not yet at timeout reschedule otherwise abort
> */
> +			if (time_after(jiffies, doe_mb->timeout_jiffies)) {
> +				rc =3D -ETIMEDOUT;
> +				goto err_abort;
> +			}
> +			schedule_delayed_work(w, PCI_DOE_POLL_INTERVAL);
> +			return;
> +		}
> +
> +		rc  =3D pci_doe_recv_resp(doe_mb, task);
> +		if (rc < 0)
> +			goto err_abort;
> +
> +		doe_mb->state =3D DOE_IDLE;
> +
> +		retire_cur_task(doe_mb);
> +		/* Set the return value to the length of received payload */
> +		signal_task_complete(task, rc);
> +
> +		return;
> +
> +	case DOE_WAIT_ABORT:
> +	case DOE_WAIT_ABORT_ON_ERR:
> +		prev_state =3D doe_mb->state;
> +
> +		pci_read_config_dword(pdev, offset + PCI_DOE_STATUS,
> &val);
> +
> +		if (!FIELD_GET(PCI_DOE_STATUS_ERROR, val) &&
> +		    !FIELD_GET(PCI_DOE_STATUS_BUSY, val)) {
> +			doe_mb->state =3D DOE_IDLE;
> +			/* Back to normal state - carry on */
> +			retire_cur_task(doe_mb);
> +		} else if (time_after(jiffies, doe_mb->timeout_jiffies)) {
> +			/* Task has timed out and is dead - abort */
> +			pci_err(pdev, "DOE [%x] ABORT timed out\n",
> +				doe_mb->cap_offset);
> +			set_bit(PCI_DOE_FLAG_DEAD, &doe_mb->flags);
> +			retire_cur_task(doe_mb);
> +		}
> +
> +		/*
> +		 * For deliberately triggered abort, someone is
> +		 * waiting.
> +		 */
> +		if (prev_state =3D=3D DOE_WAIT_ABORT) {
> +			if (task)
> +				signal_task_complete(task, -EFAULT);
> +			complete(&doe_mb->abort_c);
> +		}
> +
> +		return;
> +	}
> +
> +err_abort:
> +	doe_mb->state =3D DOE_WAIT_ABORT_ON_ERR;
> +	pci_doe_abort_start(doe_mb);
> +err_busy:
> +	signal_task_complete(task, rc);
> +	if (doe_mb->state =3D=3D DOE_IDLE)
> +		retire_cur_task(doe_mb);
> +}