Received: by 2002:a6b:fb09:0:0:0:0:0 with SMTP id h9csp3883095iog; Tue, 21 Jun 2022 07:50:43 -0700 (PDT) X-Google-Smtp-Source: AGRyM1vr46czbOv3SLragA3O6EtOr9PBBjuS/4hCTFmWN2vPru+jErIYZuJSiyY0nKi7KTqnoO1f X-Received: by 2002:a17:907:a42b:b0:722:e6c1:6c61 with SMTP id sg43-20020a170907a42b00b00722e6c16c61mr2183792ejc.663.1655823043660; Tue, 21 Jun 2022 07:50:43 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1655823043; cv=none; d=google.com; s=arc-20160816; b=tMgknV5nqr1KxbxBuJQZSJlWTVuaZiubAyu59yVqoYm0+zuMwLd8909h5xNhkVnkiT FnYfGaVHIE6YpzLtoMR5jo3j3WYwiDpVP5vS9fxkrolFP9uOxRbFkx6frHyXKxUHuhBn 4T2WmGcjaL/M3QST8yF9kYh8dq96GbIPDWRTEWMQirGbnjP7I3v3RSgwzZ0ikL+0Ky9H A56QqqUS5OkWi5sgLVL4QfHIUJb/RTgF78ElotUKS1zHKLs1FCItgmawBnvCUQtRm3gf v0GUFsgHM0k9u0f9ivwGYnVojDM1/WHZT5Q7sOSyogk7S29WWFBC5KOmCg/jMim3141k /wYA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=Pakdd0VakpWDjtd55gtZ3pppXu9ENvzknNf4sSE9sPM=; b=aaL6J8HtWTIo9DI9bvkse+shxg/XkKh6nNBmLR8lqjUSEtD77aohRqjGqZY7msa2qy SQ5MWAln59op3IfLnR3fCUSlpXaAtZSPKDHBTqKwcDlBemJ+qRp+z713lU8R7WF1e8Ll 435c2VBs6pSTvRAgjSUk/XT3KnAQA2lLImkXx9/yBVBI1AQkRJZuQ/CXtcBs+6moJP1+ O0q2fOKTkcm6t6d4L7QWbfZwltNbmvzVmw9kH5RUC9HhI0+kFU6D4MU5lC84lYEtXH+i qgHdGRYiszjtzOovdUPdS21eqScB506OdDc3G0tKslU4f3qcykMzQKDvD2mNxLwOBlLP d2ag== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=UE8NhWg3; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Return-Path: Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id ji1-20020a170907980100b006dfc3945326si19279662ejc.152.2022.06.21.07.50.17; Tue, 21 Jun 2022 07:50:43 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=UE8NhWg3; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1351970AbiFUOsy (ORCPT + 99 others); Tue, 21 Jun 2022 10:48:54 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54292 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1351913AbiFUOs3 (ORCPT ); Tue, 21 Jun 2022 10:48:29 -0400 Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 606C5175AB for ; Tue, 21 Jun 2022 07:48:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1655822908; x=1687358908; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=lhycCS4wbry/vuRpESFIadvLk2GAh7jSnTYweECgm5s=; b=UE8NhWg3FaL+ITILFfl+aSpEcmx4cTLKr6rg4Asp36NPxiit7odytCLv 696SUHmqKjfI9T6XmgEn2vuF+wv7uNz3ZrFTdI+gF4lxIrCXr8C1O5qva PN+Q3MHYV7A+ht0PIIzhSfrWHaf0hqlEn8WrDM6hkpodPhv6Tx2tZY72c vg3C+DkpROH8sRVAFyuIl9nx57vTjesux35SswmmqQyazFou9QMQhhVmC X+YnWhuGpKvWAZGdCDIShjqbAN9dNamkVOO6Cfn4hFp8jSCQLjsBpr1h4 Xp7RNF9VNu6IXgM2EQaGD8pRZ/QV2qjTjIP6P0GdtJUREkLjw1xw3xm24 Q==; X-IronPort-AV: E=McAfee;i="6400,9594,10384"; a="260566678" X-IronPort-AV: E=Sophos;i="5.92,209,1650956400"; d="scan'208";a="260566678" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Jun 2022 07:48:28 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.92,209,1650956400"; d="scan'208";a="643659346" Received: from allen-box.sh.intel.com ([10.239.159.48]) by fmsmga008.fm.intel.com with ESMTP; 21 Jun 2022 07:48:24 -0700 From: Lu Baolu To: Joerg Roedel , Jason Gunthorpe , Christoph Hellwig , Kevin Tian , Ashok Raj , Will Deacon , Robin Murphy , Jean-Philippe Brucker , Dave Jiang , Vinod Koul Cc: Eric Auger , Liu Yi L , Jacob jun Pan , iommu@lists.linux-foundation.org, iommu@lists.linux.dev, linux-kernel@vger.kernel.org, Lu Baolu , Jean-Philippe Brucker Subject: [PATCH v9 06/11] arm-smmu-v3/sva: Add SVA domain support Date: Tue, 21 Jun 2022 22:43:48 +0800 Message-Id: <20220621144353.17547-7-baolu.lu@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220621144353.17547-1-baolu.lu@linux.intel.com> References: <20220621144353.17547-1-baolu.lu@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-4.9 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_NONE,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add support for SVA domain allocation and provide an SVA-specific iommu_domain_ops. Signed-off-by: Lu Baolu Reviewed-by: Jean-Philippe Brucker --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 6 ++ .../iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c | 69 +++++++++++++++++++ drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 3 + 3 files changed, 78 insertions(+) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h index d2ba86470c42..96399dd3a67a 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h @@ -758,6 +758,7 @@ struct iommu_sva *arm_smmu_sva_bind(struct device *dev, struct mm_struct *mm); void arm_smmu_sva_unbind(struct iommu_sva *handle); u32 arm_smmu_sva_get_pasid(struct iommu_sva *handle); void arm_smmu_sva_notifier_synchronize(void); +struct iommu_domain *arm_smmu_sva_domain_alloc(void); #else /* CONFIG_ARM_SMMU_V3_SVA */ static inline bool arm_smmu_sva_supported(struct arm_smmu_device *smmu) { @@ -803,5 +804,10 @@ static inline u32 arm_smmu_sva_get_pasid(struct iommu_sva *handle) } static inline void arm_smmu_sva_notifier_synchronize(void) {} + +static inline struct iommu_domain *arm_smmu_sva_domain_alloc(void) +{ + return NULL; +} #endif /* CONFIG_ARM_SMMU_V3_SVA */ #endif /* _ARM_SMMU_V3_H */ diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c index f155d406c5d5..fc4555dac5b4 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c @@ -549,3 +549,72 @@ void arm_smmu_sva_notifier_synchronize(void) */ mmu_notifier_synchronize(); } + +static int arm_smmu_sva_set_dev_pasid(struct iommu_domain *domain, + struct device *dev, ioasid_t id) +{ + int ret = 0; + struct mm_struct *mm; + struct iommu_sva *handle; + + if (domain->type != IOMMU_DOMAIN_SVA) + return -EINVAL; + + mm = domain->mm; + if (WARN_ON(!mm)) + return -ENODEV; + + mutex_lock(&sva_lock); + handle = __arm_smmu_sva_bind(dev, mm); + if (IS_ERR(handle)) + ret = PTR_ERR(handle); + mutex_unlock(&sva_lock); + + return ret; +} + +static void arm_smmu_sva_block_dev_pasid(struct iommu_domain *domain, + struct device *dev, ioasid_t id) +{ + struct mm_struct *mm = domain->mm; + struct arm_smmu_bond *bond = NULL, *t; + struct arm_smmu_master *master = dev_iommu_priv_get(dev); + + mutex_lock(&sva_lock); + list_for_each_entry(t, &master->bonds, list) { + if (t->mm == mm) { + bond = t; + break; + } + } + + if (!WARN_ON(!bond) && refcount_dec_and_test(&bond->refs)) { + list_del(&bond->list); + arm_smmu_mmu_notifier_put(bond->smmu_mn); + kfree(bond); + } + mutex_unlock(&sva_lock); +} + +static void arm_smmu_sva_domain_free(struct iommu_domain *domain) +{ + kfree(domain); +} + +static const struct iommu_domain_ops arm_smmu_sva_domain_ops = { + .set_dev_pasid = arm_smmu_sva_set_dev_pasid, + .block_dev_pasid = arm_smmu_sva_block_dev_pasid, + .free = arm_smmu_sva_domain_free, +}; + +struct iommu_domain *arm_smmu_sva_domain_alloc(void) +{ + struct iommu_domain *domain; + + domain = kzalloc(sizeof(*domain), GFP_KERNEL); + if (!domain) + return NULL; + domain->ops = &arm_smmu_sva_domain_ops; + + return domain; +} diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c index ae8ec8df47c1..a30b252e2f95 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -1999,6 +1999,9 @@ static struct iommu_domain *arm_smmu_domain_alloc(unsigned type) { struct arm_smmu_domain *smmu_domain; + if (type == IOMMU_DOMAIN_SVA) + return arm_smmu_sva_domain_alloc(); + if (type != IOMMU_DOMAIN_UNMANAGED && type != IOMMU_DOMAIN_DMA && type != IOMMU_DOMAIN_DMA_FQ && -- 2.25.1