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[71.212.119.14]) by smtp.gmail.com with ESMTPSA id s7-20020a17090302c700b00168e83eda56sm11297873plk.3.2022.06.21.16.34.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 21 Jun 2022 16:34:18 -0700 (PDT) From: Robert Foss To: bjorn.andersson@linaro.org, agross@kernel.org, mturquette@baylibre.com, sboyd@kernel.org, robh+dt@kernel.org, krzk+dt@kernel.org, jonathan@marek.ca, robert.foss@linaro.org, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Dmitry Baryshkov , Konrad Dybcio Subject: [PATCH v6 0/6] SM8350 Display/GPU clock enablement Date: Wed, 22 Jun 2022 01:34:06 +0200 Message-Id: <20220621233412.506768-1-robert.foss@linaro.org> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Changes since v2 - Dropped "clk: Introduce CLK_ASSUME_ENABLED_WHEN_UNUSED" - Dropped "clk: qcom: sm8250-dispcc: Flag shared RCGs as assumed enable" - Dropped "clk: qcom: rcg2: Cache rate changes for parked RCGs" Changes since v3: - Dropped RBs & SoBs for bigger changes - Changed author to me for patches with big changes Changes since v5: - Reverted dispcc-sm8350 split from dispcc-sm8250 and related .index changes - Bjorn - Re-added Tags that were thrown out due to the above revert Jonathan Marek (2): clk: qcom: add support for SM8350 DISPCC dt-bindings: clock: Add Qcom SM8350 DISPCC bindings Robert Foss (4): arm64: dts: qcom: sm8350: Replace integers with rpmpd defines clk: qcom: add support for SM8350 GPUCC dt-bindings: clock: Add Qcom SM8350 GPUCC bindings arm64: dts: qcom: sm8350: Add DISPCC node .../bindings/clock/qcom,dispcc-sm8x50.yaml | 6 +- .../bindings/clock/qcom,gpucc-sm8350.yaml | 72 ++ arch/arm64/boot/dts/qcom/sm8350.dtsi | 42 +- drivers/clk/qcom/Kconfig | 12 +- drivers/clk/qcom/Makefile | 1 + drivers/clk/qcom/dispcc-sm8250.c | 60 +- drivers/clk/qcom/gpucc-sm8350.c | 637 ++++++++++++++++++ .../dt-bindings/clock/qcom,dispcc-sm8350.h | 1 + include/dt-bindings/clock/qcom,gpucc-sm8350.h | 52 ++ 9 files changed, 870 insertions(+), 13 deletions(-) create mode 100644 Documentation/devicetree/bindings/clock/qcom,gpucc-sm8350.yaml create mode 100644 drivers/clk/qcom/gpucc-sm8350.c create mode 120000 include/dt-bindings/clock/qcom,dispcc-sm8350.h create mode 100644 include/dt-bindings/clock/qcom,gpucc-sm8350.h -- 2.34.1