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Date:   Wed, 22 Jun 2022 09:06:00 +0200
From:   Uwe =?utf-8?Q?Kleine-K=C3=B6nig?= <u.kleine-koenig@pengutronix.de>
To:     "Peng Fan (OSS)" <peng.fan@oss.nxp.com>
Cc:     robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org,
        shawnguo@kernel.org, s.hauer@pengutronix.de, festevam@gmail.com,
        linux-imx@nxp.com, hvilleneuve@dimonoff.com,
        l.stach@pengutronix.de, abbaraju.manojsai@amarulasolutions.com,
        jagan@amarulasolutions.com, matteo.lisi@engicam.com,
        tharvey@gateworks.com, t.remmet@phytec.de, t.remmet@phytec.deh,
        devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
        linux-kernel@vger.kernel.org, Peng Fan <peng.fan@nxp.com>
Subject: Re: [PATCH 00/14] arm64: dts: imx8mp: correct pad settings
Message-ID: <20220622070600.gb3wep7rltwdivkk@pengutronix.de>
References: <20220622061410.853301-1-peng.fan@oss.nxp.com>
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Hello,

On Wed, Jun 22, 2022 at 02:13:56PM +0800, Peng Fan (OSS) wrote:
> From: Peng Fan <peng.fan@nxp.com>
>=20
> i.MX8MP iomux pad BIT3 and BIT0 are reserved bits. Writing 1 to the
> reserved bit will be ignored and reading will still return 0. Although
> function not broken with reserved bits set, we should not set reserved
> bits.

I wonder how you found these. Some time ago I wrote a tool for such
issues[1]. Currently it only supports i.MX25, i.MX6DL and i.MX6Q, but
extending it for the other SoCs should be only some industious effort.

Best regards
Uwe

[1] https://git.pengutronix.de/cgit/tools/dt-utils/tree/src/dtblint-imx-pin=
mux.c


--=20
Pengutronix e.K.                           | Uwe Kleine-K=F6nig            |
Industrial Linux Solutions                 | https://www.pengutronix.de/ |

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