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Subject: Re: [PATCH] cpufreq: Add Zhaoxin turbo boost control interface
 support
To:     "Rafael J. Wysocki" <rafael@kernel.org>
CC:     Viresh Kumar <viresh.kumar@linaro.org>,
        Linux PM <linux-pm@vger.kernel.org>,
        Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
        <CobeChen@zhaoxin.com>, <TimGuo@zhaoxin.com>,
        <LindaChai@zhaoxin.com>, <LeoLiu@zhaoxin.com>
References: <8b748cc6-09c9-081c-c0c5-2e75f017b032@zhaoxin.com>
 <CAJZ5v0gOOcy-POdtmM13n=weJGYNT8BEkix9Bzk_=0GNcgi_5w@mail.gmail.com>
From:   Tony W Wang-oc <TonyWWang-oc@zhaoxin.com>
Message-ID: <d8973256-9818-7da0-0907-ce2eefc47dd5@zhaoxin.com>
Date:   Thu, 23 Jun 2022 09:11:43 +0800
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On 22/6/2022 21:39, Rafael J. Wysocki wrote:
> On Wed, Jun 22, 2022 at 5:44 AM Tony W Wang-oc <TonyWWang-oc@zhaoxin.com> wrote:
>>
>> Recent Zhaoxin CPUs support X86_FEATURE_IDA and the turbo boost can
>> be dynamically enabled or disabled through MSR 0x1a0[38] in the same
>> way as Intel. So add turbo boost control support for Zhaoxin too.
> 
> And for Centaur too according to the code changes below.

Ok, thanks a lot.

> 
>>
>> Signed-off-by: Tony W Wang-oc <TonyWWang-oc@zhaoxin.com>
>> ---
>>    drivers/cpufreq/acpi-cpufreq.c | 4 ++++
>>    1 file changed, 4 insertions(+)
>>
>> diff --git a/drivers/cpufreq/acpi-cpufreq.c b/drivers/cpufreq/acpi-cpufreq.c
>> index 3d514b8..1bb2b90 100644
>> --- a/drivers/cpufreq/acpi-cpufreq.c
>> +++ b/drivers/cpufreq/acpi-cpufreq.c
>> @@ -78,6 +78,8 @@ static bool boost_state(unsigned int cpu)
>>
>>          switch (boot_cpu_data.x86_vendor) {
>>          case X86_VENDOR_INTEL:
>> +       case X86_VENDOR_CENTAUR:
>> +       case X86_VENDOR_ZHAOXIN:
>>                  rdmsr_on_cpu(cpu, MSR_IA32_MISC_ENABLE, &lo, &hi);
>>                  msr = lo | ((u64)hi << 32);
>>                  return !(msr & MSR_IA32_MISC_ENABLE_TURBO_DISABLE);
>> @@ -97,6 +99,8 @@ static int boost_set_msr(bool enable)
>>
>>          switch (boot_cpu_data.x86_vendor) {
>>          case X86_VENDOR_INTEL:
>> +       case X86_VENDOR_CENTAUR:
>> +       case X86_VENDOR_ZHAOXIN:
>>                  msr_addr = MSR_IA32_MISC_ENABLE;
>>                  msr_mask = MSR_IA32_MISC_ENABLE_TURBO_DISABLE;
>>                  break;
>> --
>> 2.7.4
> .
> 

-- 
Sincerely
TonyWWang-oc