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Date:   Thu, 23 Jun 2022 09:26:15 +0200
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Subject: Re: DMA-buf and uncached system memory
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To:     Pekka Paalanen <ppaalanen@gmail.com>
Cc:     Daniel Stone <daniel@fooishbar.org>,
        Nicolas Dufresne <nicolas@ndufresne.ca>,
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        Sumit Semwal <sumit.semwal@linaro.org>,
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Am 23.06.22 um 09:13 schrieb Pekka Paalanen:
> On Thu, 23 Jun 2022 08:59:41 +0200
> Christian König <christian.koenig@amd.com> wrote:
>
>> The exporter isn't doing anything wrong here. DMA-buf are supposed to be
>> CPU cached and can also be cache hot.
> Hi,
>
> what is that statement based on?

On the design documentation of DMA-buf and the actual driver 
implementations.

Coherency and snooping of the CPU cache is mandatory for devices and 
root complexes in the PCI specification. Incoherent access is just an 
extension.

We inherited that by basing DMA-buf on the Linux kernel DMA-API which in 
turn is largely based on the PCI specification.

> Were the (mandatory for CPU access) cpu_access_begin/end functions &
> ioctls not supposed to ensure that CPU cache is up-to-date / CPU cache
> is fully flushed out?

No, those functions are to inform the exporter that the importer has 
started and finished accessing the buffer using the CPU.

There is no signaling in the other direction. In other words the 
exporter doesn't inform the importer about CPU accesses because it is 
the owner of the buffer.

It's the responsibility of the importer to make sure that it can 
actually access the data in the buffer. If it can't guarantee that the 
importer shouldn't import the buffer in the first place.

Regards,
Christian.

>
>
> Thanks,
> pq