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[2620:137:e000::1:20]) by mx.google.com with ESMTP id g2-20020aa7dc42000000b0042dbb8886fesi3495860edu.59.2022.06.23.03.36.36; Thu, 23 Jun 2022 03:37:24 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b="A0HhYrZ/"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230192AbiFWKYh (ORCPT + 99 others); Thu, 23 Jun 2022 06:24:37 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54454 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230173AbiFWKYf (ORCPT ); Thu, 23 Jun 2022 06:24:35 -0400 Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0A9BD3B578 for ; Thu, 23 Jun 2022 03:24:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1655979874; x=1687515874; h=message-id:subject:from:to:cc:date:in-reply-to: references:content-transfer-encoding:mime-version; bh=PXRJDRdRgy2fwuZsMUdDm1uxBBKgX7JBwjMasOxK/Hk=; b=A0HhYrZ/Vuj5CDM63FN9G8pj82KpkbxT9Df9h59T+8tnz7o0u8a4ExG6 bvEf6kGenF6pmkvMScl0JqZi0IHTf1UUG3bBFS2cvDybUJpoh0l+P4s+5 hZ95gKZ5DBhowZrW6iqd1UAZobn+deMTKbs9hBaktsz5zxBybCbQuYQ55 M7COXwcXJHZpb3RqDJGSF1/GxGP3S+NOgnl+mLYKmRDmy+Po18r8N4Ahb JzEcgU4pL/rNMGeKPjmW6dOv/2FIxlLwoMdjldm8bHNLSPPJBVKtTTNhR 0R7CtQT4RloxL9mmJbJXXT4d6hlV8mkX5NEZU3nijZCUFo7t/ewcahZPr w==; X-IronPort-AV: E=McAfee;i="6400,9594,10386"; a="306141484" X-IronPort-AV: E=Sophos;i="5.92,215,1650956400"; d="scan'208";a="306141484" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Jun 2022 03:24:34 -0700 X-IronPort-AV: E=Sophos;i="5.92,215,1650956400"; d="scan'208";a="656111133" Received: from mjalmada-desk.amr.corp.intel.com (HELO khuang2-desk.gar.corp.intel.com) ([10.209.144.88]) by fmsmga004-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Jun 2022 03:24:31 -0700 Message-ID: <97ace776b756312de05d3a9c8b1ca251e714db17.camel@intel.com> Subject: Re: [PATCH v8 2/5] x86/tdx: Add TDX Guest event notify interrupt support From: Kai Huang To: Sathyanarayanan Kuppuswamy , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org Cc: "H . Peter Anvin" , "Kirill A . Shutemov" , Tony Luck , Andi Kleen , Wander Lairson Costa , Isaku Yamahata , marcelo.cerri@canonical.com, tim.gardner@canonical.com, khalid.elmously@canonical.com, philip.cox@canonical.com, linux-kernel@vger.kernel.org, "Nakajima, Jun" Date: Thu, 23 Jun 2022 22:24:29 +1200 In-Reply-To: References: <20220609025220.2615197-1-sathyanarayanan.kuppuswamy@linux.intel.com> <20220609025220.2615197-3-sathyanarayanan.kuppuswamy@linux.intel.com> <78873cc1db47ba00a4c01f38290521c1a6072820.camel@intel.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.44.2 (3.44.2-1.fc36) MIME-Version: 1.0 X-Spam-Status: No, score=-7.7 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,SPF_NONE, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, 2022-06-20 at 08:44 -0700, Sathyanarayanan Kuppuswamy wrote: > I agree that event notification is currently only used for attestation. B= ut I > think in future there could be other use cases for it.=C2=A0 >=20 We have TDVMCALL in GHCI 1.5. It allows specifying the vector. I don't know whether there's any future case that still needs SetupEventNotifyInterrupt. > If the intention is just > to use it for attestation, then we can just modify the GetQuote TDVMCALL = to pass > the vector address, and there is no need for new TDVMCALL.=20 The TDVMCALL in GHCI 1.5 actually supports specifying the vector. = It currently neither clearly says "the VMM should inject event to the vCPU on = which the TDVMCALL is called", nor it allows specifying which vCPU to in= ject. Assuming we can lobby (I am already lobbying, actually) to make either way,= in fact I think it can be used as IRQ way (like I described in my first reply)= . I once lobbied to completely remove GetQuote (and SetupEventNotifyInterrupt= ) from GHCI 1.0 and move TDVMCALL from GHCI 1.5 to 1.0, and define a= new sub-service for attestation -- GetQuote will be one command then, and we ca= n define more attestation related commands (which is likely) when needed. I believe using TDVMCALL for GetQuote can actually allow kernel to u= se IRQ way, but doesn't need a system vector. But this wasn't successful. --=20 Thanks, -Kai