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[92.40.171.44]) by smtp.gmail.com with ESMTPSA id n14-20020a5d67ce000000b0021b89c07b6asm406757wrw.108.2022.06.23.13.53.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 23 Jun 2022 13:53:32 -0700 (PDT) References: <20220620200644.1961936-1-aidanmacdonald.0x0@gmail.com> <20220620200644.1961936-16-aidanmacdonald.0x0@gmail.com> From: Aidan MacDonald To: Andy Shevchenko Cc: Mark Brown , Andy Gross , Bjorn Andersson , Srinivas Kandagatla , Banajit Goswami , Greg Kroah-Hartman , "Rafael J. Wysocki" , Chanwoo Choi , Krzysztof Kozlowski , Bartlomiej Zolnierkiewicz , MyungJoo Ham , Michael Walle , Linus Walleij , Bartosz Golaszewski , Thomas Gleixner , Marc Zyngier , Lee Jones , Manivannan Sadhasivam , Cristian Ciocaltea , Chen-Yu Tsai , "tharvey@gateworks.com" , "rjones@gateworks.com" , Matti Vaittinen , "orsonzhai@gmail.com" , "baolin.wang7@gmail.com" , "zhang.lyra@gmail.com" , Jernej Skrabec , Samuel Holland , Liam Girdwood , Jaroslav Kysela , Takashi Iwai , Linux Kernel Mailing List , "open list:GPIO SUBSYSTEM" , "linux-actions@lists.infradead.org" , linux-arm-msm , linux-arm Mailing List , "linux-sunxi@lists.linux.dev" , ALSA Development Mailing List Subject: Re: [PATCH 15/49] regmap-irq: Change the behavior of mask_writeonly In-reply-to: Date: Thu, 23 Jun 2022 21:54:37 +0100 Message-ID: <8qRxwIYmbvte9HM2KVfkdhwPpeZ7oY9s@localhost> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_ENVFROM_END_DIGIT, FREEMAIL_FROM,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Andy Shevchenko writes: > On Tuesday, June 21, 2022, Aidan MacDonald = wrote: >> Andy Shevchenko writes: >> >> > On Mon, Jun 20, 2022 at 10:08 PM Aidan MacDonald >> > wrote: >> >> >> >> No drivers currently use mask_writeonly, and in its current form >> >> it seems a bit misleading. When set, mask registers will be >> >> updated with regmap_write_bits() instead of regmap_update_bits(), >> >> but regmap_write_bits() still does a read-modify-write under the >> >> hood. It's not a write-only operation. >> >> >> >> Performing a simple regmap_write() is probably more useful, since >> >> it can be used for chips that have separate set & clear registers >> >> for controlling mask bits. Such registers are normally volatile >> >> and read as 0, so avoiding a register read minimizes bus traffic. >> > >> > Reading your explanations and the code, I would rather think about >> > fixing the regmap_write_bits() to be writeonly op. >> >> That's impossible without special hardware support. >> >> > Otherwise it's unclear what's the difference between >> > regmap_write_bits() vs. regmap_update_bits(). >> >> This was not obvious to me either. They're the same except in how they >> issue the low-level write op -- regmap_update_bits() will only do the >> write if the new value differs from the current one. regmap_write_bits() >> will always do a write, even if the new value is the same. > > Okay, it makes a lot of sense for W1C type of bits in the register. > Also, =E2=80=9Creading=E2=80=9D might imply to restore last value from ca= che, no? Maybe there needs to be some explanation of what the typical use case is and why you'd choose write_bits() over update_bits(), because the more I think about it the less clear it is. You're right that the read could be served from a cache. But I'm not sure if a cache would be safe if even one bit in the register is volatile, and I can't really see a use case for write_bits() that doesn't involve volatile behavior of some sort. In any event, I'm just going to drop this patch and the related driver patches in favor of removing mask_writeonly entirely, since it looks like it was never used, and after thinking about it I'm not sure what I did helps much. If some driver needs write_bits() for mask registers down the road it's not a big deal to add this back. >> I think the problem is lack of documentation. I only figured this out >> by reading the implementation. >> >> >> if (d->chip->mask_writeonly) >> >> - return regmap_write_bits(d->map, reg, mask, val); >> >> + return regmap_write(d->map, reg, val & mask); >> >> else >> >> return regmap_update_bits(d->map, reg, mask, val);