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Date:   Thu, 23 Jun 2022 17:03:30 -0700
From:   Guru Das Srinagesh <quic_gurus@quicinc.com>
To:     Andy Shevchenko <andy.shevchenko@gmail.com>
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Subject: Re: [PATCH 18/49] mfd: qcom-pm8008: Add broken_mask_unmask irq chip
 flag
Message-ID: <20220624000329.GB21400@quicinc.com>
References: <20220620200644.1961936-1-aidanmacdonald.0x0@gmail.com>
 <20220620200644.1961936-19-aidanmacdonald.0x0@gmail.com>
 <CAHp75Vea8F5ogP8kjfdP4SK3aeohoRnkGZ7LtsLuwfXwL+APvA@mail.gmail.com>
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On Tue, Jun 21, 2022 at 11:35:09AM +0200, Andy Shevchenko wrote:
> On Mon, Jun 20, 2022 at 10:08 PM Aidan MacDonald
> <aidanmacdonald.0x0@gmail.com> wrote:
> >
> > The qcom-pm8008 appears to use "1 to enable" convention for
> > enabling interrupts, with separate set and clear registers.
> > It's relying on masks and unmasks being inverted from their
> 
> It relies
> 
> > intuitive meaning, so it needs the broken_mask_unmask flag.
> 
> How has it worked until now?

It is as Aidan rightly pointed out. When I was writing the pm8008 driver, I
found that the mask and unmask terminology used in the framework was inverted
when it came to the hardware, so I had to make do and swap them.

It works because in regmap_irq_sync_unlock(), the same mask is used to update
mask_reg and unmask_reg, except that it is inverted for updating the unmask
register. So, by just swapping which register gets updated with the plain mask
and which one gets updated with the inverted mask, I could use the framework to
accomplish the setting and clearing of the correct registers.