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From:   Andy Shevchenko <andy.shevchenko@gmail.com>
Date:   Tue, 28 Jun 2022 13:52:34 +0200
Message-ID: <CAHp75Vc0t+3p2TGs9kZ-6JP8y-+cmSF++9uCfbWAgFhapteh-A@mail.gmail.com>
Subject: Re: [PATCH v3 07/14] mfd: mt6370: Add Mediatek MT6370 support
To:     ChiaEn Wu <peterwu.pub@gmail.com>
Cc:     Lee Jones <lee.jones@linaro.org>,
        Daniel Thompson <daniel.thompson@linaro.org>,
        Jingoo Han <jingoohan1@gmail.com>, Pavel Machek <pavel@ucw.cz>,
        Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Matthias Brugger <matthias.bgg@gmail.com>,
        Sebastian Reichel <sre@kernel.org>,
        Chunfeng Yun <chunfeng.yun@mediatek.com>,
        Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
        Jonathan Cameron <jic23@kernel.org>,
        Lars-Peter Clausen <lars@metafoo.de>,
        Liam Girdwood <lgirdwood@gmail.com>,
        Mark Brown <broonie@kernel.org>,
        Guenter Roeck <linux@roeck-us.net>,
        "Krogerus, Heikki" <heikki.krogerus@linux.intel.com>,
        Helge Deller <deller@gmx.de>,
        ChiaEn Wu <chiaen_wu@richtek.com>,
        Alice Chen <alice_chen@richtek.com>,
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On Fri, Jun 24, 2022 at 12:19 PM ChiaEn Wu <peterwu.pub@gmail.com> wrote:
> Andy Shevchenko <andy.shevchenko@gmail.com> =E6=96=BC 2022=E5=B9=B46=E6=
=9C=8824=E6=97=A5 =E9=80=B1=E4=BA=94 =E5=87=8C=E6=99=A82:01=E5=AF=AB=E9=81=
=93=EF=BC=9A
> > On Thu, Jun 23, 2022 at 1:59 PM ChiaEn Wu <peterwu.pub@gmail.com> wrote=
:

...

> > >  obj-$(CONFIG_INTEL_SOC_PMIC_BXTWC)  +=3D intel_soc_pmic_bxtwc.o
> > >  obj-$(CONFIG_INTEL_SOC_PMIC_CHTWC)     +=3D intel_soc_pmic_chtwc.o
> > >  obj-$(CONFIG_INTEL_SOC_PMIC_CHTDC_TI)  +=3D intel_soc_pmic_chtdc_ti.=
o
> > >  obj-$(CONFIG_MFD_MT6360)       +=3D mt6360-core.o
> > > +obj-$(CONFIG_MFD_MT6370)       +=3D mt6370.o
> > >  mt6397-objs                    :=3D mt6397-core.o mt6397-irq.o mt635=
8-irq.o
> > >  obj-$(CONFIG_MFD_MT6397)       +=3D mt6397.o
> > >  obj-$(CONFIG_INTEL_SOC_PMIC_MRFLD)     +=3D intel_soc_pmic_mrfld.o
> >
> > This whole bunch of drivers is in the wrong place in Makefile.
> >
> > https://lore.kernel.org/all/20220616182524.7956-2-andriy.shevchenko@lin=
ux.intel.com/
>
> hmm... So shall we need to cherry-pick your this patch first,
> then modify the Makefile before the next submission??

I don't know what Lee's preferences are, but at least I have these
options in mind:
1) wait until Lee applies my series;
2) take that single patch to your tree as a precursor.

In the second case you will need to send the series with that patch as well=
.

...

> > > +#define MT6370_REG_MAXADDR     0x1FF
> >
> > Wondering if (BIT(10) - 1) gives a better hint on how hardware limits
> > this (so it will be clear it's 10-bit address).
>
> well... This "0x1FF" is just a virtual mapping value to map the max
> address of the PMU bank(0x1XX).
> So, I feel its means is different from using (BIT(10) - 1) here.

Perhaps a comment then?

...

> > > +       if (ret < 0)
> > > +               return ret;
> > > +       else if (ret !=3D val_size)
> >
> > Redundant 'else'.
>
> I'm not quite sure what you mean, so I made the following changes first.
> ------------------------------------
>        if (ret < 0)
>               return ret;
>        if (ret !=3D val_size)
>               return -EIO;
> ------------------------------------
> I don't know if it meets your expectations??

Yes.

> > > +               return -EIO;

--=20
With Best Regards,
Andy Shevchenko