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Date:   Tue, 28 Jun 2022 16:00:01 +0100
From:   Jonathan Cameron <Jonathan.Cameron@Huawei.com>
To:     <ira.weiny@intel.com>
CC:     Dan Williams <dan.j.williams@intel.com>,
        Bjorn Helgaas <bhelgaas@google.com>,
        Lukas Wunner <lukas@wunner.de>,
        Alison Schofield <alison.schofield@intel.com>,
        Vishal Verma <vishal.l.verma@intel.com>,
        "Dave Jiang" <dave.jiang@intel.com>,
        Ben Widawsky <bwidawsk@kernel.org>,
        <linux-kernel@vger.kernel.org>, <linux-cxl@vger.kernel.org>,
        <linux-pci@vger.kernel.org>
Subject: Re: [PATCH V12 9/9] cxl/port: Parse out DSMAS data from CDAT table
Message-ID: <20220628160001.000021c5@Huawei.com>
In-Reply-To: <20220628041527.742333-10-ira.weiny@intel.com>
References: <20220628041527.742333-1-ira.weiny@intel.com>
        <20220628041527.742333-10-ira.weiny@intel.com>
Organization: Huawei Technologies Research and Development (UK) Ltd.
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On Mon, 27 Jun 2022 21:15:27 -0700
ira.weiny@intel.com wrote:

> From: Ira Weiny <ira.weiny@intel.com>
> 
> CXL Ports with memory devices attached need the information from the
> Device Scoped Memory Affinity Structure (DSMAS).  This information is
> contained within the CDAT table buffer which is cached in the port
> device.
> 
> If CDAT data is available, parse and cache DSMAS data from the table.
> Store this data in unmarshaled struct dsmas data structures for ease of
> use later.  Ensure DSMAS headers are not malicious or ill formed so as
> to cause buffer overflow errors.
> 
> Signed-off-by: Ira Weiny <ira.weiny@intel.com>
> 

Looks good to me.  Was kind of expecting yet another xarray :)

Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>