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[2620:137:e000::1:20]) by mx.google.com with ESMTP id qb12-20020a1709077e8c00b0070fc7c9d71dsi72589ejc.989.2022.06.28.14.02.21; Tue, 28 Jun 2022 14:02:54 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@chromium.org header.s=google header.b=hrycYo1I; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=chromium.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229800AbiF1U4i (ORCPT + 99 others); Tue, 28 Jun 2022 16:56:38 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41870 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229571AbiF1U4h (ORCPT ); Tue, 28 Jun 2022 16:56:37 -0400 Received: from mail-yb1-xb30.google.com (mail-yb1-xb30.google.com [IPv6:2607:f8b0:4864:20::b30]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0BB7238BE9 for ; Tue, 28 Jun 2022 13:56:35 -0700 (PDT) Received: by mail-yb1-xb30.google.com with SMTP id q132so24273286ybg.10 for ; Tue, 28 Jun 2022 13:56:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=yKQEF36ycuzYUOPVu3KHfZYhntaUg963Kzu5sKnBaTc=; b=hrycYo1Ilsww+6NSQ+00snPQqSnCaqYxagPNrHHbji/zEqKK13+YAs/PV+CuDfQbBu 1hqyk4kUqZ87fcFU2QapjCjwUok2kTlDVLOgj8IhXpbiZ6Pk2rqljqQjXtn+fUJOBF4o lHcwA+kIIuZmPGVBLi+HinV4qMJyrpvEDpgMU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=yKQEF36ycuzYUOPVu3KHfZYhntaUg963Kzu5sKnBaTc=; b=0xMESutbaaHXYUj31rxyM5DaQkkfbQuBomYAkFfmw2HLma675hCXCBfu8qDp73WB7a 7ZdFKlAnEDAu7rxNjbI5AQnRoOZhLg19Z+KGlJasnVWXNx+xiCQMMyCYNeEnG1WxO3mO AlmXVgZofSDL9Xe5XYA0UNVTjTVUo88PwXx+Ql9wIRu0Ffq9hVGQLMjma3GT6vmZMmQ6 MG65+iVha2Cw8U44eW6s8hDloXzSKIF21b/ioJ+OO24EX3rgxLNvS55HqkqmvmZpd8Qr HQYDUAMAmW0Vxpu/zads74aK3I5id08hSQ4MPC23M00BBA9s1yWtMhFzSytXMuP7yvs/ 7VhA== X-Gm-Message-State: AJIora+GXZTnNy90ylEhT1Ce3MYhzCH1VXXEiwtO31g0/irxnhzzPm+B eDsLPAJfuJ1xxW6cl2DuU5kGr/A/hn6d92HvNoQtCA== X-Received: by 2002:a25:da0b:0:b0:66c:850f:1b71 with SMTP id n11-20020a25da0b000000b0066c850f1b71mr22360839ybf.336.1656449794292; Tue, 28 Jun 2022 13:56:34 -0700 (PDT) MIME-Version: 1.0 References: <20220622173605.1168416-1-pmalani@chromium.org> <20220622173605.1168416-6-pmalani@chromium.org> In-Reply-To: From: Prashant Malani Date: Tue, 28 Jun 2022 13:56:22 -0700 Message-ID: Subject: Re: [PATCH v5 5/9] drm/bridge: anx7625: Add typec_mux_set callback function To: Stephen Boyd Cc: linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, bleung@chromium.org, heikki.krogerus@linux.intel.com, Pin-Yen Lin , AngeloGioacchino Del Regno , =?UTF-8?B?TsOtY29sYXMgRiAuIFIgLiBBIC4gUHJhZG8=?= , Allen Chen , Andrzej Hajda , Daniel Vetter , David Airlie , devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, Greg Kroah-Hartman , Hsin-Yi Wang , Jernej Skrabec , Jonas Karlman , =?UTF-8?B?Sm9zw6kgRXhww7NzaXRv?= , Krzysztof Kozlowski , Laurent Pinchart , Maxime Ripard , Neil Armstrong , Robert Foss , Rob Herring , Sam Ravnborg , Thomas Zimmermann , Xin Ji Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-2.5 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Jun 28, 2022 at 1:40 PM Stephen Boyd wrote: > > Quoting Prashant Malani (2022-06-28 12:48:11) > > On Tue, Jun 28, 2022 at 12:25 PM Stephen Boyd wrote: > > > > > > Quoting Prashant Malani (2022-06-22 10:34:34) > > > > diff --git a/drivers/gpu/drm/bridge/analogix/anx7625.c b/drivers/gpu/drm/bridge/analogix/anx7625.c > > > > index bd21f159b973..5992fc8beeeb 100644 > > > > --- a/drivers/gpu/drm/bridge/analogix/anx7625.c > > > > +++ b/drivers/gpu/drm/bridge/analogix/anx7625.c > [..] > > > > + > > > > + if (ctx->num_typec_switches == 1) > > > > > > How do we handle the case where the usb-c-connector is directly > > > connected to the RX1/TX1 and RX2/TX2 pins? This device would be an > > > orientation (normal/reverse) and mode switch (usb/dp) in that scenario, > > > but this code is written in a way that the orientation switch isn't > > > going to flip the crosspoint switch for the different pin assignments. > > > > If all 4 SS lanes are connected to 1 usb-c-connector; there would be > > just 1 "typec-switch" node. > > In that case, the DT would only specify it as an "orientation-switch" > > and register > > an orientation-switch with the Type-C framework. The orientation switch would > > pretty much do what the mode-switch callback does here (configuring > > the crosspoint > > switch). > > One could also register a "mode-switch" there but it wouldn't do > > anything (all 4 lanes are already > > connected so there is nothing to re-route in the crosspoint switch). > > Hence the above "if" check. > > Would we still want to route the DP traffic out if the pin assignment > didn't have DP? Does the hardware support some mode where the DP traffic > is shutdown? Or maybe the HPD pin needs to be quieted unless DP is > assigned? I reference this below, but in the 1 connector case, CC lines would also be routed to the anx7625 from the usb-connector, so it will know when HPD is asserted or not. > > I suppose none of those things matter though as long as there is some > typec switch registered here so that the driver can be informed of the > pin assignment. Is it right that the "mode-switch" property is only > required in DT if this device is going to control the mode of the > connector, i.e. USB+DP, or just DP? Where this device can't do that > because it doesn't support only DP. If the anx7625 is used just to route all lanes from 1 usb-c-connector (i.e the USB+DP case), a mode-switch wouldn't be of much use, since one would also route the CC lines to the built-in PD controller; so it will already have knowledge of what mode the switch is in. The mode-switch is likely only relevant for this hardware configuration( it's "DP only" in the sense that the USB pins to the SoC never go anywhere). One only has 2 SS lanes each (from each usb-c-connector). Since there is no CC-line, the anx7625 needs to know which one has DP enabled on it. > > > > > Unfortunately, I don't have hardware which connects all 4 SS lanes > > from 1 Type-C port > > to the anx7625, so I didn't add the orientation switch handling to the > > driver (since I have no way of verifying it). > > Alright. Maybe add a TODO then so it's more obvious that orientation > isn't handled. Ack. Will add a comment in v6. > > > > > Regarding DP alt-mode pin assignments : I think anx7625 will only support Pin D > > (only 2 lane DP, no 4 lane DP). > > > > Makes sense. Thanks!