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Subject: Re: [PATCH 4/4] riscv: implement cache-management errata for T-Head
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To:     Heiko Stuebner <heiko@sntech.de>
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References: <20220619203212.3604485-1-heiko@sntech.de>
 <20220619203212.3604485-5-heiko@sntech.de>
From:   Samuel Holland <samuel@sholland.org>
Message-ID: <3ea5c3a7-8b17-18d5-9f38-bc0dcd79497d@sholland.org>
Date:   Tue, 28 Jun 2022 20:29:46 -0500
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On 6/19/22 3:32 PM, Heiko Stuebner wrote:
> The T-Head C906 and C910 implement a scheme for handling
> cache operations different from the generic Zicbom extension.
> 
> Add an errata for it next to the generic dma coherency ops.
> 
> Signed-off-by: Heiko Stuebner <heiko@sntech.de>

Thanks for the update!

Reviewed-by: Samuel Holland <samuel@sholland.org>
Tested-by: Samuel Holland <samuel@sholland.org>