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[192.55.54.37]) by smtp.gmail.com with ESMTPSA id h24-20020a635318000000b0040dffa7e3d7sm5460901pgb.16.2022.06.29.03.13.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 29 Jun 2022 03:13:57 -0700 (PDT) Date: Wed, 29 Jun 2022 03:13:56 -0700 From: Isaku Yamahata To: Sagi Shahar Cc: "Yamahata, Isaku" , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, isaku.yamahata@gmail.com, Paolo Bonzini , Erdem Aktas , Sean Christopherson Subject: Re: [RFC PATCH v6 090/104] KVM: TDX: Handle TDX PV CPUID hypercall Message-ID: <20220629101356.GA882746@ls.amr.corp.intel.com> References: <98939c0ec83a109c8f49045e82096d6cdd5dafa3.1651774251.git.isaku.yamahata@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM, RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Jun 14, 2022 at 11:15:00AM -0700, Sagi Shahar wrote: > On Thu, May 5, 2022 at 11:16 AM wrote: > > > > From: Isaku Yamahata > > > > Wire up TDX PV CPUID hypercall to the KVM backend function. > > > > Signed-off-by: Isaku Yamahata > > --- > > arch/x86/kvm/vmx/tdx.c | 22 ++++++++++++++++++++++ > > 1 file changed, 22 insertions(+) > > > > diff --git a/arch/x86/kvm/vmx/tdx.c b/arch/x86/kvm/vmx/tdx.c > > index 9c712f661a7c..c7cdfee397ec 100644 > > --- a/arch/x86/kvm/vmx/tdx.c > > +++ b/arch/x86/kvm/vmx/tdx.c > > @@ -946,12 +946,34 @@ static int tdx_emulate_vmcall(struct kvm_vcpu *vcpu) > > return 1; > > } > > > > +static int tdx_emulate_cpuid(struct kvm_vcpu *vcpu) > > +{ > > + u32 eax, ebx, ecx, edx; > > + > > + /* EAX and ECX for cpuid is stored in R12 and R13. */ > > + eax = tdvmcall_a0_read(vcpu); > > + ecx = tdvmcall_a1_read(vcpu); > > + > > + kvm_cpuid(vcpu, &eax, &ebx, &ecx, &edx, true); > > According to the GHCI spec section 3.6 > (TDG.VP.VMCALL) we should return > VMCALL_INVALID_OPERAND if an invalid CPUID is requested. > > kvm_cpuid already returns false in this case so we should use that > return value to set the tdvmcall return code in case of invalid leaf. Based on CPUID instruction, cpuid results in #UD when lock prefix is used or earlier CPU that doesn't support cpuid instruction. So I'm not sure what CPUID input result in INVALID_OPERAND error. Does the following make sense for you? --- a/arch/x86/kvm/vmx/tdx.c +++ b/arch/x86/kvm/vmx/tdx.c @@ -1347,7 +1347,7 @@ static int tdx_emulate_cpuid(struct kvm_vcpu *vcpu) eax = tdvmcall_a0_read(vcpu); ecx = tdvmcall_a1_read(vcpu); - kvm_cpuid(vcpu, &eax, &ebx, &ecx, &edx, true); + kvm_cpuid(vcpu, &eax, &ebx, &ecx, &edx, false); tdvmcall_a0_write(vcpu, eax); tdvmcall_a1_write(vcpu, ebx); thanks, -- Isaku Yamahata