Received: by 2002:a6b:fb09:0:0:0:0:0 with SMTP id h9csp495578iog; Wed, 29 Jun 2022 04:41:13 -0700 (PDT) X-Google-Smtp-Source: AGRyM1sXs443lC8ziBacJE92U4hNX4LvcotZ8ms+XdYnDyxz4Af3nvxLvPkaKROt5pUYubfPMkKk X-Received: by 2002:a17:906:4795:b0:722:f42b:18b8 with SMTP id cw21-20020a170906479500b00722f42b18b8mr3020648ejc.34.1656502872868; Wed, 29 Jun 2022 04:41:12 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1656502872; cv=none; d=google.com; s=arc-20160816; b=OE9l4WOujur2UBOlbpeCqXq68CcTypANSBcNcAQlnu8HfAZIL0SGi35QdAaD9YqH7W EXmrteAFPLyuYxuHAPXtjaPRSor4hMMPqly7oylj+caN7tZo9dtEUiSl9MQ9sARWNy6D 2TpxL8UW8nIFbG7AWNuNJ5NbCyotZw5KvZNB1q02eubQIwykOzJ8TwxDyo/aFd6HDdsk 0exwJ31yDhGaD4fOgbpEp7wL0DPvAZvI0pZiHL/r6TBah73QmbdwNnEjBA+jxz2RIMhi 6E6kcZ0wQJtpeViorAlU984OkjhPCdxQBsGKB4FBhDxxKGjuRkKz36YvKeJNmrIrvD2G U1SQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from:dkim-signature; bh=0flt+HyYafkhgKTgeX8niuziO9HXSJvloYwWOGGdVog=; b=z2AhKRAj6cCq4lasb9f3By7/lIzyEkRIOSIRFgMEi4GF7Uyyluu3kXETIVHsL4BZDm 5cnPceD674eEm0tgVyiDJJzjylSzyWLKXKY3vaccwOp8YyZmaRuHXGrmYF6cm9S671a3 BUpEH0N134UoWaOCaMmdZsp1ULiS/yVTlS6uvXUgeTzPRcrV2mty2PGRISWgJojdwrK3 otXGDq1PSHxWs3erEbZdbtdf7N+zbjmzAbFEU1FiG8Zi+L8K/mJ7f+hPLW+o9DEhPtZ2 fwP0Hd668jp/KcTweR7Ub7a6ao6/zOrBvjSkgGf5U6EF+UEWfMu/dY/7RwXIiAgH01BR NpQA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=P5HReg7V; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Return-Path: Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id d12-20020a50e40c000000b004356e098edesi491314edm.389.2022.06.29.04.40.47; Wed, 29 Jun 2022 04:41:12 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=P5HReg7V; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232492AbiF2L3a (ORCPT + 99 others); Wed, 29 Jun 2022 07:29:30 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34010 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232507AbiF2L32 (ORCPT ); Wed, 29 Jun 2022 07:29:28 -0400 Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C6E343EA8F for ; Wed, 29 Jun 2022 04:29:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1656502167; x=1688038167; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=agE+svFz2YlLao+aBslE9EdRxUGuCqo+TydcNWMnUoA=; b=P5HReg7VjdVLmu2+B5PA4PCsFpcTfY+ByMQKvXvFyG0q2qSrPa7GnoZW TPQ0MH2KNVq1C+7KmJE61ZRTXu4dONIaApQITvbFb5IeGK1IN56MYVt+D yQVLKa53z19zztoiw4iEvak2p+G5X6ltVu6fawkRNMTJnQe2rc5AKb9hQ eMaPWfi/W914cq4vWIg2RF3gCGMg/vjNS++ZQZlf+RgJUHoJD/mLJO7GL qPF1ygYXBbQm1ZGLtTHMiF2di1NEIg+gcv5GYkpQ/6CJ5Iv4ijYDhAEwc WopN5aq0IgERkQCjzw/A1LRpkg0gJEFJ6IoKoyqW0kR1h86OUgX3hKFio A==; X-IronPort-AV: E=McAfee;i="6400,9594,10392"; a="368319185" X-IronPort-AV: E=Sophos;i="5.92,231,1650956400"; d="scan'208";a="368319185" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Jun 2022 04:29:27 -0700 X-IronPort-AV: E=Sophos;i="5.92,231,1650956400"; d="scan'208";a="647352998" Received: from sannilnx.jer.intel.com ([10.12.26.157]) by fmsmga008-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Jun 2022 04:29:24 -0700 From: Alexander Usyskin To: Greg Kroah-Hartman , Jani Nikula , Joonas Lahtinen , Rodrigo Vivi , David Airlie , Daniel Vetter , Tvrtko Ursulin Cc: Tomas Winkler , Alexander Usyskin , Vitaly Lubart , intel-gfx@lists.freedesktop.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 00/14] GSC support for XeHP SDV and DG2 platforms Date: Wed, 29 Jun 2022 14:28:59 +0300 Message-Id: <20220629112913.1210933-1-alexander.usyskin@intel.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-4.8 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add GSC support for XeHP SDV and DG2 platforms. The series includes changes for the mei driver: - add ability to use polling instead of interrupts - add ability to use extended timeouts - setup extended operational memory for GSC The series includes changes for the i915 driver: - allocate extended operational memory for GSC - GSC on XeHP SDV offsets and definitions Greg KH, please review and ACK the MEI patches. (The patch 13 is one that you asked to change in prev version) We are pushing these patches through gfx tree as the auxiliary device belongs there. V2: rebase over merged DG1 series and DG2 enablement patch, fix commit messages V3: rebase over latest tip V4: add missed changelog in pxp dbugfs patch Alexander Usyskin (5): drm/i915/gsc: add slow_fw flag to the mei auxiliary device drm/i915/gsc: add slow_fw flag to the gsc device definition drm/i915/gsc: add GSC XeHP SDV platform definition mei: gsc: wait for reset thread on stop mei: extend timeouts on slow devices. Daniele Ceraolo Spurio (1): HAX: drm/i915: force INTEL_MEI_GSC on for CI Tomas Winkler (5): mei: gsc: use polling instead of interrupts mei: mkhi: add memory ready command mei: gsc: setup gsc extended operational memory mei: debugfs: add pxp mode to devstate in debugfs drm/i915/gsc: allocate extended operational memory in LMEM Vitaly Lubart (3): drm/i915/gsc: skip irq initialization if using polling mei: bus: export common mkhi definitions into a separate header mei: gsc: add transition to PXP mode in resume flow drivers/gpu/drm/i915/Kconfig.debug | 1 + drivers/gpu/drm/i915/gt/intel_gsc.c | 119 +++++++++++++++++++++++++--- drivers/gpu/drm/i915/gt/intel_gsc.h | 3 + drivers/misc/mei/bus-fixup.c | 105 ++++++++++++++++-------- drivers/misc/mei/client.c | 14 ++-- drivers/misc/mei/debugfs.c | 17 ++++ drivers/misc/mei/gsc-me.c | 77 +++++++++++++++--- drivers/misc/mei/hbm.c | 12 +-- drivers/misc/mei/hw-me-regs.h | 7 ++ drivers/misc/mei/hw-me.c | 116 ++++++++++++++++++++++----- drivers/misc/mei/hw-me.h | 14 +++- drivers/misc/mei/hw-txe.c | 2 +- drivers/misc/mei/hw.h | 5 ++ drivers/misc/mei/init.c | 21 ++++- drivers/misc/mei/main.c | 2 +- drivers/misc/mei/mei_dev.h | 26 ++++++ drivers/misc/mei/mkhi.h | 57 +++++++++++++ drivers/misc/mei/pci-me.c | 2 +- include/linux/mei_aux.h | 2 + 19 files changed, 511 insertions(+), 91 deletions(-) create mode 100644 drivers/misc/mei/mkhi.h -- 2.34.1