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[2620:137:e000::1:20]) by mx.google.com with ESMTP id h22-20020a63e156000000b0040c8a3c4980si20400984pgk.190.2022.06.29.07.14.19; Wed, 29 Jun 2022 07:14:36 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=ZjsqCrRo; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=collabora.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232944AbiF2Nmt (ORCPT + 99 others); Wed, 29 Jun 2022 09:42:49 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44718 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232080AbiF2Nms (ORCPT ); Wed, 29 Jun 2022 09:42:48 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4A7A6165AA; Wed, 29 Jun 2022 06:42:47 -0700 (PDT) Received: from [192.168.1.100] (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 3AA3C66018E6; Wed, 29 Jun 2022 14:42:45 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1656510165; bh=yZfjVxY6+YXqMfBxFuUmxRr5cT0DDLUiTsXg6Wh0k2g=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=ZjsqCrRocInx8/7JVJzW/PWjNnbzcMcStAQJbMxb34J/jG+0YN1VArupFBp05E5EP 6BrWQJ3/gecrZof+ZCYEXiLg8v2ZZhsvuQoddMAirjRawu+qfW2qOCmroViDaXb/GJ LxxZs6hoCe3gKNVfQb9qeN2Xj/MFuOyqf4w9HGrWWeK//DDiOI9XCgEOy3fwrp7IhI w4WVANEauc6olby+Ftsnim/FoMDj5lpbLax40AevKHdfOcQRhDV9tlUlb9FMltELcn asGqEYBHtoyeKgLdZ4gHWnyGySIcxZdKKU0UuYx+DhVwQEIVpLdxzxxbkk/OwQM0Vt Jlt95gJ5Bi5Fw== Message-ID: <730f334e-c10d-8f8b-94e6-b66a56e03320@collabora.com> Date: Wed, 29 Jun 2022 15:42:42 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.10.0 Subject: Re: [PATCH 4/5] arm64: dts: mt8192: Add dsi node Content-Language: en-US To: Allen-KH Cheng , Matthias Brugger , Rob Herring , Krzysztof Kozlowski Cc: Project_Global_Chrome_Upstream_Group@mediatek.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, Chen-Yu Tsai References: <20220629121358.19458-1-allen-kh.cheng@mediatek.com> <20220629121358.19458-5-allen-kh.cheng@mediatek.com> From: AngeloGioacchino Del Regno In-Reply-To: <20220629121358.19458-5-allen-kh.cheng@mediatek.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,NICE_REPLY_A,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Il 29/06/22 14:13, Allen-KH Cheng ha scritto: > Add dsi ndoe for mt8192 SoC. > > Signed-off-by: Allen-KH Cheng > --- > arch/arm64/boot/dts/mediatek/mt8192.dtsi | 18 ++++++++++++++++++ > 1 file changed, 18 insertions(+) > > diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi > index 26d01544b4ea..72af328126de 100644 > --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi > +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi > @@ -1334,6 +1334,24 @@ > mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xe000 0x1000>; > }; > > + dsi0: dsi@14010000 { > + compatible = "mediatek,mt8183-dsi"; > + reg = <0 0x14010000 0 0x1000>; > + interrupts = ; > + mediatek,syscon-dsi = <&mmsys 0x140>; > + clocks = <&mmsys CLK_MM_DSI0>, > + <&mmsys CLK_MM_DSI_DSI0>, > + <&mipi_tx0>; > + clock-names = "engine", "digital", "hs"; > + phys = <&mipi_tx0>; > + phy-names = "dphy"; resets = <&mmsys MT8192_MMSYS_SW0_RST_B_DISP_DSI0>; ^^^ This is missing, please add it and resend :-) > + status = "disabled"; > + > + port { > + dsi_out: endpoint { }; > + }; > + }; > + > ovl_2l2: ovl@14014000 { > compatible = "mediatek,mt8192-disp-ovl-2l"; > reg = <0 0x14014000 0 0x1000>;