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[68.147.0.187]) by smtp.gmail.com with ESMTPSA id b16-20020a170903229000b001696751796asm11660712plh.139.2022.06.29.09.28.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 29 Jun 2022 09:28:33 -0700 (PDT) Date: Wed, 29 Jun 2022 10:28:31 -0600 From: Mathieu Poirier To: Rob Herring Cc: Mike Leach , Leo Yan , Suzuki K Poulose , Krzysztof Kozlowski , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH v2 0/3] dt-bindings: Arm CoreSight binding schema conversions Message-ID: <20220629162831.GB2013207@p14s> References: <20220603011933.3277315-1-robh@kernel.org> <20220620165541.GA1458883@p14s> <20220628180118.GA703354-robh@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20220628180118.GA703354-robh@kernel.org> X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Jun 28, 2022 at 12:01:18PM -0600, Rob Herring wrote: > On Mon, Jun 20, 2022 at 10:55:41AM -0600, Mathieu Poirier wrote: > > Hi Rob, > > > > On Thu, Jun 02, 2022 at 08:19:30PM -0500, Rob Herring wrote: > > > This series converts all the CoreSight debug bindings to DT schema > > > format. These bindings are at the top of the list of occurrences of > > > bindings without a schema. For arm64 dts files: > > > > > > 702 ['arm,coresight-etm4x', 'arm,primecell'] > > > 536 ['arm,coresight-cpu-debug', 'arm,primecell'] > > > 509 ['arm,coresight-dynamic-funnel', 'arm,primecell'] > > > 213 ['arm,coresight-tmc', 'arm,primecell'] > > > 143 ['arm,coresight-dynamic-replicator', 'arm,primecell'] > > > 97 ['arm,coresight-stm', 'arm,primecell'] > > > > > > I'll send a reply to these with the errors in dts files that this > > > causes. I've reviewed them and they all look legit. Xilinx Zynq though > > > has 3 clocks instead of 2. > > > > > > v2: > > > - Rename other Coresight bindings to use compatible string for filename > > > - Add missing arm,coresight-dynamic-replicator.yaml and > > > arm,coresight-static-funnel.yaml > > > - Update MAINTAINERS > > > - Fix coresight.txt references > > > > What a massive undertaking... I have looked scrupulously and everything adds up. > > Let me know if you were looking for me to pick this up. Otherwise: > > > > Reviewed-by: Mathieu Poirier > > Can you apply. I think there was another series from QCom touching > the MAINTAINERS entry that will conflict. I just tried a rebased on today's linux-next and it didn't blow up. > > There's a couple of indentation fixups. Can you fix when applying or do > you want me to resend? Fixed and applied. Thanks, Mathieu > > Rob