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[104.57.184.186]) by smtp.gmail.com with ESMTPSA id g13-20020a05683030ad00b0060afaae0e34sm11200311ots.0.2022.06.30.07.18.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 30 Jun 2022 07:18:33 -0700 (PDT) Date: Thu, 30 Jun 2022 09:18:32 -0500 From: Bjorn Andersson To: Vinod Koul Cc: Andrey Konovalov , agross@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] arm64: dts: qcom: qcs404: fix default pinctrl settings for blsp1_spi1 Message-ID: References: <20220611195713.131597-1-andrey.konovalov@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed 22 Jun 00:18 CDT 2022, Vinod Koul wrote: > On 11-06-22, 22:57, Andrey Konovalov wrote: > > The current settings refer to "blsp_spi1" function which isn't defined. > > For this reason an attempt to enable blsp1_spi1 interface results in > > the probe failure below: > > > > [ 3.492900] qcs404-pinctrl 1000000.pinctrl: invalid function blsp_spi1 in map table > > [ 3.502460] qcs404-pinctrl 1000000.pinctrl: invalid function blsp_spi1 in map table > > [ 3.517725] qcs404-pinctrl 1000000.pinctrl: invalid function blsp_spi1 in map table > > [ 3.532998] qcs404-pinctrl 1000000.pinctrl: invalid function blsp_spi1 in map table > > [ 3.548277] spi_qup: probe of 78b6000.spi failed with error -22 > > > > Fix this by making the functions used in qcs404.dtsi to match the contents > > of drivers/pinctrl/qcom/pinctrl-qcs404.c. > > Right, I cannot find blsp_spi1 which is the only one which is missing, > not sure why... > > Bjorn do you recall why SPI1 is treated differently... > Looking at the available pinctrl functions, I believe that blsp_spi1 has two possible mux options; identified b y blsp_spi_*_a1 and blsp_spi_*_b1. Regards, Bjorn > > > > Signed-off-by: Andrey Konovalov > > --- > > arch/arm64/boot/dts/qcom/qcs404.dtsi | 21 +++++++++++++++++++-- > > 1 file changed, 19 insertions(+), 2 deletions(-) > > > > diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi > > index d912166b7552..0d9e1f19aa67 100644 > > --- a/arch/arm64/boot/dts/qcom/qcs404.dtsi > > +++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi > > @@ -669,8 +669,25 @@ blsp1_spi0_default: blsp1-spi0-default { > > }; > > > > blsp1_spi1_default: blsp1-spi1-default { > > - pins = "gpio22", "gpio23", "gpio24", "gpio25"; > > - function = "blsp_spi1"; > > + mosi { > > + pins = "gpio22"; > > + function = "blsp_spi_mosi_a1"; > > + }; > > + > > + miso { > > + pins = "gpio23"; > > + function = "blsp_spi_miso_a1"; > > + }; > > + > > + cs_n { > > + pins = "gpio24"; > > + function = "blsp_spi_cs_n_a1"; > > + }; > > + > > + clk { > > + pins = "gpio25"; > > + function = "blsp_spi_clk_a1"; > > + }; > > }; > > > > blsp1_spi2_default: blsp1-spi2-default { > > -- > > 2.25.1 > > -- > ~Vinod