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[2620:137:e000::1:20]) by mx.google.com with ESMTP id dt20-20020a170907729400b00726be0cb176si5951342ejc.837.2022.06.30.08.35.34; Thu, 30 Jun 2022 08:36:01 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=MStz7IyI; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=collabora.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236054AbiF3Pdy (ORCPT + 99 others); Thu, 30 Jun 2022 11:33:54 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41338 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235992AbiF3Pdd (ORCPT ); Thu, 30 Jun 2022 11:33:33 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E80213D4AF; Thu, 30 Jun 2022 08:33:30 -0700 (PDT) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 06AFF660196F; Thu, 30 Jun 2022 16:33:27 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1656603208; bh=1JcXT52lGvmiujq9SlqH/7EhbMPvCM0k/ja4Nuch5SQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=MStz7IyII9DzXfU97xk5lFFREtC79isX3YyBn+IxjN546cX9WP5HRcygO0CA1aFdJ QMKQctJrXAxaaeTSa8eoMjZm2TkxSb0JAS3YHtiU6Xim1Z9ag2wyxRqmg/prWrHt3G bvKWGKDPEqeC5TD1HX7cL2MhX6RClvgQIZKnyrYr9phDO3Z85LTwTHqLxAgL7dU9o+ AIdaqn1khwyFx+JLvjKlQ/snzz0wHLp+6/ml+RKUShLkrHMoY5Pwe0plEo/dEJV99g 5Hy3iagK2pttNsCKDfpP+68jNPxi4VN4vAaYIZB2Jdb7vatx3dD6z6SptxKiIb55GU Xtlr36TkYi7pg== From: AngeloGioacchino Del Regno To: robh+dt@kernel.org Cc: krzysztof.kozlowski+dt@linaro.org, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, hsinyi@chromium.org, nfraprado@collabora.com, allen-kh.cheng@mediatek.com, gtk3@inbox.ru, luca@z3ntu.xyz, sam.shih@mediatek.com, sean.wang@mediatek.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, wenst@chromium.org Subject: [PATCH 05/11] arm64: dts: mediatek: cherry: Add support for internal eMMC storage Date: Thu, 30 Jun 2022 17:33:10 +0200 Message-Id: <20220630153316.308767-6-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220630153316.308767-1-angelogioacchino.delregno@collabora.com> References: <20220630153316.308767-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add mtk-sd controller and pin configuration to enable the internal eMMC storage: now it is possible to mount a rootfs located at the internal storage. Signed-off-by: AngeloGioacchino Del Regno --- .../boot/dts/mediatek/mt8195-cherry.dtsi | 87 +++++++++++++++++++ 1 file changed, 87 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi index 091338f7d5ff..8c4b492f774f 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi @@ -9,6 +9,7 @@ / { aliases { + mmc0 = &mmc0; serial0 = &uart0; }; @@ -87,6 +88,26 @@ ppvar_sys: regulator-ppvar-sys { }; }; +&mmc0 { + status = "okay"; + + bus-width = <8>; + cap-mmc-highspeed; + cap-mmc-hw-reset; + hs400-ds-delay = <0x14c11>; + max-frequency = <200000000>; + mmc-hs200-1_8v; + mmc-hs400-1_8v; + no-sdio; + no-sd; + non-removable; + pinctrl-names = "default", "state_uhs"; + pinctrl-0 = <&mmc0_pins_default>; + pinctrl-1 = <&mmc0_pins_uhs>; + vmmc-supply = <&mt6359_vemc_1_ldo_reg>; + vqmmc-supply = <&mt6359_vufs_ldo_reg>; +}; + /* for CPU-L */ &mt6359_vcore_buck_reg { regulator-always-on; @@ -123,6 +144,72 @@ &mt6359_vufs_ldo_reg { regulator-always-on; }; +&pio { + mmc0_pins_default: mmc0-default-pins { + pins-cmd-dat { + pinmux = , + , + , + , + , + , + , + , + ; + input-enable; + drive-strength = ; + bias-pull-up = ; + }; + + pins-clk { + pinmux = ; + drive-strength = ; + bias-pull-down = ; + }; + + pins-rst { + pinmux = ; + drive-strength = ; + bias-pull-up = ; + }; + }; + + mmc0_pins_uhs: mmc0-uhs-pins { + pins-cmd-dat { + pinmux = , + , + , + , + , + , + , + , + ; + input-enable; + drive-strength = ; + bias-pull-up = ; + }; + + pins-clk { + pinmux = ; + drive-strength = ; + bias-pull-down = ; + }; + + pins-ds { + pinmux = ; + drive-strength = ; + bias-pull-down = ; + }; + + pins-rst { + pinmux = ; + drive-strength = ; + bias-pull-up = ; + }; + }; +}; + &pmic { interrupts-extended = <&pio 222 IRQ_TYPE_LEVEL_HIGH>; }; -- 2.35.1