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[2620:137:e000::1:20]) by mx.google.com with ESMTP id hv9-20020a17090760c900b006e878a53334si26446222ejc.363.2022.06.30.09.57.37; Thu, 30 Jun 2022 09:58:10 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@google.com header.s=20210112 header.b=OHv55hkJ; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236235AbiF3Q2u (ORCPT + 99 others); Thu, 30 Jun 2022 12:28:50 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37016 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235445AbiF3Q2t (ORCPT ); Thu, 30 Jun 2022 12:28:49 -0400 Received: from mail-oi1-x231.google.com (mail-oi1-x231.google.com [IPv6:2607:f8b0:4864:20::231]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 480B7340F0 for ; Thu, 30 Jun 2022 09:28:48 -0700 (PDT) Received: by mail-oi1-x231.google.com with SMTP id u199so2245oie.0 for ; Thu, 30 Jun 2022 09:28:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=DuU0Oc6sEw1/gSI0hNRo//d9uDydGl0aHe9l6WG2Fv0=; b=OHv55hkJS4mGKcPWvgYa/NIZRvchN42QRzsIBMvgBRHeJTy+9oMiCGHykvLd2/cyAn +VQ0nHlZyG+1vX1MgWtSan5/r8A7m+pIvx6sXHKr6Z9Is5Fo2/zW3pNuK67FY9EkkPQw 6l06MaNRVBFLLgU1mkxJuMCMs4ianACLY0dPiuYTql79zczbx9f9HLZq2woeI6blZnhW pXpmhEB8qAk5oURPj1k3+9sYJJIgac/00eWdwvppUwp8gRlEHXfFvB+3cdZhv7EQECvA kDi6keH741MiOGrPZsAcKTgCpKj0HLnAZIx5QYlxC4oGATMEeniAavK0i3ZkO++8poQ5 QS+Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=DuU0Oc6sEw1/gSI0hNRo//d9uDydGl0aHe9l6WG2Fv0=; b=H/zqreoZdOSp7tjhjN57bE1F9xlwfMm8EMGz7wmNWtMtTEOs4KSbjuVGWnVaytUrOI xDPW0itksZSoUgJXq5YrrIuNWMVbrY/n9htTgZ4AO1Fe7oQUctJ92oSsL3p3S0YOAbDf GdCdi1ih73UP1lrkWY7n+CbtUcHgNPltzxk1Spa4h2jZd7gX49qoeBd2y9uoBqwzcpZx UKzoybt5/2AYFzdX6fEB92mmkEnEFmKVNQivtkV5M6wlS7nIjR+/mr65gY7VsvmjCUhf 43A9zWYIp9cGDkqxbEPky6blzmMwD9iXuNN7sdPc1qBsaaI33ww9sRx+liDj43KTqHRb AKTQ== X-Gm-Message-State: AJIora+u7pimUWw/pIYc+QOZxKHixpTgHIxQuG4vae3KaxJA+07rFv/n HvVB7VuQa12RsVC4g/TpbVmT1VTzIQBYx7yW+BKMww== X-Received: by 2002:a05:6808:3089:b0:32e:f7fd:627d with SMTP id bl9-20020a056808308900b0032ef7fd627dmr5742640oib.181.1656606527413; Thu, 30 Jun 2022 09:28:47 -0700 (PDT) MIME-Version: 1.0 References: <20220614204730.3359543-1-seanjc@google.com> <7e05e0befa13af05f1e5f0fd8658bc4e7bdf764f.camel@redhat.com> In-Reply-To: From: Jim Mattson Date: Thu, 30 Jun 2022 09:28:36 -0700 Message-ID: Subject: Re: [PATCH v2 00/21] KVM: x86: Event/exception fixes and cleanups To: Maxim Levitsky Cc: Sean Christopherson , Paolo Bonzini , Vitaly Kuznetsov , Wanpeng Li , Joerg Roedel , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Oliver Upton , Peter Shier Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-17.6 required=5.0 tests=BAYES_00,DKIMWL_WL_MED, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF, ENV_AND_HDR_SPF_MATCH,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE,USER_IN_DEF_DKIM_WL,USER_IN_DEF_SPF_WL autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Jun 30, 2022 at 1:22 AM Maxim Levitsky wrote: > > On Wed, 2022-06-29 at 06:42 -0700, Jim Mattson wrote: > > Unlike the AMD "INTn intercept," these trap intercepts *do not* happen > > at the start of the instruction. > > Are you sure about that? I had been sure when I wrote that, but now that I see your response, I have to question my memory. The SDM is definitely more authoritative than I am. > > When you say "ignores," do you mean that AMD ignores a data breakpoint > > or single-step trap generated by MOV-SS, or it ignores the fact that > > delivering such a #DB trap between the MOV-SS and the subsequent > > MOV-ESP will create a stack frame in the wrong place? > > Two things which can be infered from the SVM spec. > - AMD doesn't distinguish between MOV SS and STI int shadow. > - AMD has no 'pending debug exception field' in the vmcb. > > I don't know what AMD does for #DB that happens on MOV SS, nor if it > does distinguish these internally, > probably just drops the #DB or something. Without carrying pending debug exceptions, it seems that the only two choices are to deliver the #DB, with the exception frame in an unintended location or to drop the #DB. The latter seems preferable, but neither one seems good. What I don't understand is why you claim that AMD does this "rightfully." Are you saying that anyone with the audacity to run a debugger on legacy code deserves to be thrown in front of a moving train? > > Hence, the facility for injecting a "pending MTF"--so that it won't be "lost." > Yes, though that is would be mostly useful for nesting. > > For not nesting hypervisor, if the hypervisor figured out that a higher priority event overrode > the MTF, it can just process the MTF - why to re-inject it? You're right. The facility is probably just there to make MTF virtualizable. Intel was paying much closer attention to virtualizability by the time MTF came along. > > > > These are single-step, I/O and data breakpoint traps. > > I am not sure what you mean. single-step, IO, data breakpoints are indeed the trap #DB, > while "general detect", code breakpoint are fault #DB, and we also have the task switch #DB, but since the hardware doesn't > emulate the task switches, this has to be injected. Just enumerating. No more, no less.