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Date:   Fri, 1 Jul 2022 09:09:09 +0200
From:   Herve Codina <herve.codina@bootlin.com>
To:     <Claudiu.Beznea@microchip.com>
Cc:     <gregkh@linuxfoundation.org>, <robh+dt@kernel.org>,
        <krzysztof.kozlowski+dt@linaro.org>, <Nicolas.Ferre@microchip.com>,
        <alexandre.belloni@bootlin.com>, <mturquette@baylibre.com>,
        <sboyd@kernel.org>, <Horatiu.Vultur@microchip.com>,
        <linux-usb@vger.kernel.org>, <devicetree@vger.kernel.org>,
        <linux-arm-kernel@lists.infradead.org>,
        <linux-kernel@vger.kernel.org>, <linux-clk@vger.kernel.org>,
        <thomas.petazzoni@bootlin.com>
Subject: Re: [PATCH v3 3/3] ARM: dts: lan966x: Add UDPHS support
Message-ID: <20220701090909.50654cb4@bootlin.com>
In-Reply-To: <f4f14941-6839-5691-b2d1-adb049118a4d@microchip.com>
References: <20220525071036.223396-1-herve.codina@bootlin.com>
        <20220525071036.223396-4-herve.codina@bootlin.com>
        <f4f14941-6839-5691-b2d1-adb049118a4d@microchip.com>
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Hi Claudiu,

On Thu, 30 Jun 2022 09:31:00 +0000
<Claudiu.Beznea@microchip.com> wrote:

> On 25.05.2022 10:10, Herve Codina wrote:
> > EXTERNAL EMAIL: Do not click links or open attachments unless you know =
the content is safe
> >=20
> > Add UDPHS (the USB High Speed Device Port controller) support.
> >=20
> > The both lan966x SOCs (LAN9662 and LAN9668) have the same UDPHS
> > IP. This IP is also the same as the one present in the SAMA5D3
> > SOC.
> >=20
> > Signed-off-by: Herve Codina <herve.codina@bootlin.com>
> > ---
> >  arch/arm/boot/dts/lan966x.dtsi | 11 +++++++++++
> >  1 file changed, 11 insertions(+)
> >=20
> > diff --git a/arch/arm/boot/dts/lan966x.dtsi b/arch/arm/boot/dts/lan966x=
.dtsi
> > index 7d2869648050..e086df741f99 100644
> > --- a/arch/arm/boot/dts/lan966x.dtsi
> > +++ b/arch/arm/boot/dts/lan966x.dtsi
> > @@ -196,6 +196,17 @@ watchdog: watchdog@e0090000 {
> >                         status =3D "disabled";
> >                 };
> >=20
> > +               udc: usb@e0808000 {
> > +                       compatible =3D "microchip,lan9662-udc",
> > +                                    "atmel,sama5d3-udc";
> > +                       reg =3D <0x00200000 0x80000>,
> > +                             <0xe0808000 0x400>;
> > +                       interrupts =3D <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
> > +                       clocks =3D <&clks GCK_GATE_UDPHS>, <&nic_clk>;
> > +                       clock-names =3D "pclk", "hclk";
> > +                       status =3D "disabled";
> > +               };
> > + =20
>=20
> This doesn't apply clean on top of v5.19-rc1. Can you check and resend?

Sure,
I am going to send a rebased version of this series.

Thanks,
Herv=C3=A9

--=20
Herv=C3=A9 Codina, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com