Received: by 2002:ac0:c50a:0:0:0:0:0 with SMTP id y10csp1171464imi; Fri, 1 Jul 2022 04:43:36 -0700 (PDT) X-Google-Smtp-Source: AGRyM1trLqmF8VeuIl8MTKSRQ1ENdIc70YDkjSRBqtPEv+tIubQ6BYdSuNCU2umF9mR+6P+KZSbp X-Received: by 2002:a17:903:32c4:b0:16a:6b37:7cbe with SMTP id i4-20020a17090332c400b0016a6b377cbemr19570730plr.30.1656675816084; Fri, 01 Jul 2022 04:43:36 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1656675816; cv=none; d=google.com; s=arc-20160816; b=q0tW7U9TSooxBDAhM8i/gCNqKXf1Q1OUUw9IZquN4H2H98OEKh+wIf4BxiZ7JHKH2A /4pMhDudyZqaTdjOUX2zR3ddnUpXsb4NB+Ewb+e1ZEIynMB1Oi+XOnK6XgHloO3Ka7f8 hFt3TTQCUoEMb0Pp/4M+1NGIvpiuJO9qZfsIFvk3lg0zqKailGZimAqFKdADXe7KTTOg TFqFW0n7nQXAqTYwGCtPYmCPu85/v1mMiSNctRUyfSS1e1cPeP9+ZPp4kDu3XaMXgrtu 6kNgKc6tujFUALzkx7XpV3TvLVhriiiHnG+rQjh2hMLZkUYbd3gB0HGB/sM91XaxXqrn pHbQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from; bh=RgNyULeTGhC2i5CaKnAXRImT25tK2glnSemKs4Huy0U=; b=fHsAivtV+LOuox3Kb67H1b36ObfxpE6lRMtMIP15fbOEX/kxgL2NjtNODtgK1cRLUo cw5OvGmire4ob4CQbyhloLYY+vzU0Pcj0iMuyJQZVa8Zr/prOc+vbIGASW49d0coyPnv BpkmS5KdYpDdutIW1uqzjDuN2So4r8NbP2AkQsRcaW5vO5j2CigqmoRmzf7w1ivXNSiJ RxiGDXpijq/iFZxP6nR7k+alh/7GEBJioq4KKeVK3J61Ed/3TgTgZYyl4zn/bnq1Fuy3 QdBhQWAFVvRyQKNQY22RG2ieXv4K+5KTBp3perZ8qZ2Kat7kvweRfiv/ofjzMmsm/oVV pNEA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Return-Path: Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id m2-20020a637102000000b0040d54868742si2702535pgc.24.2022.07.01.04.43.24; Fri, 01 Jul 2022 04:43:36 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232975AbiGALZF (ORCPT + 99 others); Fri, 1 Jul 2022 07:25:05 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54538 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229562AbiGALZE (ORCPT ); Fri, 1 Jul 2022 07:25:04 -0400 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id C12777971B; Fri, 1 Jul 2022 04:25:02 -0700 (PDT) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id C5477113E; Fri, 1 Jul 2022 04:25:02 -0700 (PDT) Received: from donnerap.arm.com (donnerap.cambridge.arm.com [10.1.197.42]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 8E6E23F66F; Fri, 1 Jul 2022 04:25:00 -0700 (PDT) From: Andre Przywara To: Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Rob Herring , Krzysztof Kozlowski Cc: Linus Walleij , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org Subject: [PATCH v12 0/7] arm64: sunxi: Allwinner H616 SoC DT support Date: Fri, 1 Jul 2022 12:24:46 +0100 Message-Id: <20220701112453.2310722-1-andre.przywara@arm.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_NONE,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, the usual update round on the H616 support series, this time only about DT files, as the necessary code bits have been merged already. For simplicity I dropped the USB patches again - for now. There are three new binding patches, to fix dtbs_check complaints. For the actual .dtsi and .dts files, I addressed Jernej's comments (many thanks for having a look!) This is on top of 5.19-rc4, and can also be found here: https://github.com/apritzel/linux/commits/h616-v12 For a complete changelog, see below. Thanks! Andre ================== This series gathers patches to support the Allwinner H616 SoC. This is a rather uninspired SoC (Quad-A53 with the usual peripherals), but allows for some cheap development boards and TV boxes, and supports up to 4GB of DRAM. Some DT binding patches are sprinkled throughout the series, to add the new compatible names right before they are used. Eventually we get the .dtsi for the SoC in patch 3, and the .dts for the OrangePi Zero2 board[1] later, followed by the .dts for the X96 Mate TV box[2] afterwards. U-Boot and Trusted Firmware support is now merged in released versions, it allows booting via FEL or SD card, also you can TFTP kernels in on the OrangePi Zero 2 board. Many thanks to Jernej for his tremendous help on this, also for the awesome input and help from the #linux-sunxi IRC channel. The whole series (including the prerequisites) can also be found here: https://github.com/apritzel/linux/commits/h616-v12 Happy reviewing! Cheers, Andre [1] https://linux-sunxi.org/Orange_Pi_Zero_2 [2] https://linux-sunxi.org/X96_Mate Changelog v11 .. v12: - Add EMAC compatible string to DT bindings - Make pinctrl interrupts optional in the DT bindings - Allow a vcc-pi-supply in the pinctrl DT bindings - Fix RTC interrupt number in the .dtsi - Add vcc-px-supply properties to the OrangePi Zero 2 DT - Add /omit-if-no-ref/ to rarely used pinctrl subnodes - Drop fixed pinctrl properties from the SPI nodes in the .dtsi - Split off CS0 pin from the SPI0 pins - Remove bogus interrupt properties from the R_PIO DT node - Make DCDC-E regulator always-on Changelog v10 .. v11: - Drop already merged RTC patches - Drop USB patches - Also add RTC gate clock to the H6, but mark it as unused - Add X96 Mate manufacturer to vendor list Changelog v9 .. v10: - based on ccu-sun6i-rtc clock driver - add RTC bus clock and 32k system PLL clock - drop clock related code from actual RTC driver (just use RTC bits) - .dtsi: remove redundant status = "okay"; from .dtsi - .dts: drop #address-cells = <0> from IRQ controller nodes - .dtsi: fix indentation of IR node - .dtsi: adjust RTC node to new binding - re-add USB patches Changelog v8 .. v9: - RTC: Rely on the division to split of the H:M:S part from the day part - Add Jernej's Review tags Changelog v7 .. v8: - Rebase on top of 5.14-rc1, which already includes the previous v7 02/19 - Drop USB and Ethernet patches (to keep series small) - Use "clocks: false" in RTC DT binding (2/11) - Include fix for RTC overflow check (3/11) - Use div_64() to avoid linking error on some 32-bit platforms (4+5/11) - Adjust to changed RTC overflow check (5/11) - Drop USB nodes from .dtsi file - Move mmc-ddr-1_8v property from .dtsi file into board .dts - Fix DTC warnings (underscore in node name, soc@0, #a-c in IRQ controllers) Changelog v6 .. v7: - Fix AXP305 binding documentation blunder (01/19) - Improve new linear day support (use existing conversion functions) (04/19) - Add support for changed RTC alarm registers (05/19) - Add support for RTCs without a LOSC clock (06/19) - Rework USB PHY2 SIDDQ quirk to use PHY clocks directly (14/19) - Add X96 Mate compatible string to binding doc (17/19) - Add Rob's ACKs Changelog v5 .. v6: - Drop already merged clock, pinctrl and MMC support from this series - Properly fix AXP support by skipping power key initialisation - Add patch to support new RTC date storage encoding - Re-add USB HCI PHY refactoring - Add patch to allow USB reset line sharing - Add patch to introduce quirk for PHY2 SIDDQ clearing - Re-add USB nodes to the .dtsi - Add USB gadget support - Add DT for X96 Mate TV box Changelog v4 .. v5: - Fix CCU binding to pass dtbs_check - Add RSB compatible string to binding doc - Rename IR pin name to pass dtbs_check - Add EMAC compatible string to binding doc - Drop USB PHY support and binding doc patches - Drop USB nodes from .dtsi and .dts - Drop second EMAC node from .dtsi Changelog v3 .. v4: - Drop MMC and pinctrl matches (already in some -next trees) - Add Maxime's Acks - Add patch to update the AXP MFD DT bindings - Add new patch (05/21) to fix axp20x-pek driver - Change AXP IRQ fix to check for invalid IRQ line number - Split joint DT bindings patch (v3 18/21) into subsystems - move dwmac variable to keep christmas tree - Use enums for USB PHY compatible strings in DT binding - Enable watchdog (briefly verified to work) - Add PHY2 to HCI1&3, this fixes USB - limit r-ccu register frame length to not collide with NMI controller - add interrupt-controller property to AXP DT node Changelog v2 .. v3: - Add Rob's Acks - Drop redundant maxItems from pinctrl DT binding - Rename h_i2s* to just i2s* in pinctrl names - Use more declarative i2s0_d{in,out}{0,1} names - Add RSB pins to pinctrl - Include RSB clocks (sharing with newly added H6 versions) - Fix CEC clock (add 2nd enable bit, also fix predivider flag) - Rename PMU_UNK1 register in USB PHY - Add USB and MUSB DT binding patches - Add MMC/SD speed modes to .dtsi Changelog v1 .. v2: - pinctrl: adjust irq bank map to cover undocumented GPIO bank IRQs - use differing h_i2s0 pin output names - r-ccu: fix number of used clocks - ccu: remove PLL-PERIPHy(4X) - ccu: fix gpu1 divider range - ccu: fix usb-phy3 parent - ccu: add missing TV clocks - ccu: rework to CLK_OF_DECLARE style - ccu: enable output bit for PLL clocks - ccu: renumber clocks - .dtsi: drop sun50i-a64-system-control fallback - .dtsi: drop unknown SRAM regions - .dtsi: add more (undocumented) GPIO interrupts - .dtsi: fix I2C3 pin names - .dtsi: use a100-emmc fallback for MMC2 - .dtsi: add second EMAC controller - .dtsi: use H3 MUSB controller fallback - .dtsi: fix frame size for USB PHY PMU registers - .dtsi: add USB0 PHY references - .dtsi: fix IR controller clock source - .dts: fix LED naming and swap pins - .dts: use 5V supply parent for USB supply - .dts: drop dummy IRQ for AXP - .dts: enable 3V3 header pin power rail - .dts: add SPI flash node - .dts: make USB-C port peripheral only - add IRQ-less AXP support - add two patches to support more than one EMAC clock - add patch to rework and extend USB PHY support - add DT binding documentation patches Andre Przywara (7): dt-bindings: arm: sunxi: Add H616 EMAC compatible dt-bindings: pinctrl: sunxi: Make interrupts optional arm64: dts: allwinner: Add Allwinner H616 .dtsi file dt-bindings: pinctrl: sunxi: allow vcc-pi-supply dt-bindings: arm: sunxi: Add two H616 board compatible strings arm64: dts: allwinner: h616: Add OrangePi Zero 2 board support arm64: dts: allwinner: h616: Add X96 Mate TV box support .../devicetree/bindings/arm/sunxi.yaml | 10 + .../net/allwinner,sun8i-a83t-emac.yaml | 1 + .../pinctrl/allwinner,sun4i-a10-pinctrl.yaml | 17 +- .../devicetree/bindings/vendor-prefixes.yaml | 2 + arch/arm64/boot/dts/allwinner/Makefile | 2 + .../allwinner/sun50i-h616-orangepi-zero2.dts | 213 +++++++ .../dts/allwinner/sun50i-h616-x96-mate.dts | 177 ++++++ .../arm64/boot/dts/allwinner/sun50i-h616.dtsi | 579 ++++++++++++++++++ 8 files changed, 997 insertions(+), 4 deletions(-) create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h616-x96-mate.dts create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi -- 2.25.1