Received: by 2002:ac0:cd04:0:0:0:0:0 with SMTP id w4csp78744imn; Fri, 1 Jul 2022 10:17:26 -0700 (PDT) X-Google-Smtp-Source: AGRyM1tEkAkh43tUYdexQO3uNcQRnpdX4RtZhXs27c08g6QlR3QUbpQnZoVTIbJxW7V6mlBTmu8X X-Received: by 2002:a17:906:488d:b0:726:2cdc:dc6c with SMTP id v13-20020a170906488d00b007262cdcdc6cmr15072056ejq.62.1656695846351; Fri, 01 Jul 2022 10:17:26 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1656695846; cv=none; d=google.com; s=arc-20160816; b=wJeqlZNvkMqBuYuyr1bZxYsFw9ndgVeu/9RiF/7r3SykacC41DWMMUYAAguypp77xb GoZhOY6OsxxFsR9lK7C9H+ftMFtVibkdQv2i1OMlxAgJAfLXrO4Fs2eKULVcmWAP0OyF 6qh2VpcvBSlfVo7Mmi9PDl/ISgJXxJBRaMA6wYINGpKIy7gzi/JabVM++Q4vc2qBynaU 4JwK+p1r+i2RzrRYBYgf5zoeI1YVNgsZUrUG6WFZhaEEI2FdIffHqdUiceavdX3b1sr9 it0e7/oATfSF7coVkWyW9rFHrN4/U/hXWO4CLokBWNYQ/vCDHED/XkHm0ovwm2MFfc50 VTSA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:in-reply-to:content-transfer-encoding :content-disposition:mime-version:references:message-id:subject:cc :to:from:date:dkim-signature; bh=5fuXvCyvmG/LrNBqyqJH/sdkmUfmLbIvfk+R0vcY2gI=; b=q3fRXui7vtn1YWGX9Q3+3iFhIJ34O/XX38xuYuoRdjJE5UDGLT8Qz55jewtC6LM3xe 9SiUe24Bv1q113bWL8EcJ5qgjErRzhGbANN0WKcFSkTnhKmMqLqjg54b86GAEFcysclG IoQFGW6ebUgQJutat+ftUfsspKhS57LwuiQj38NLT2g/9AwzxJ00hg99KOfBAIaKJI6W stn17dC0VF+KeE/Vg1iC6KvT06QTRuZB3ES71EPq7/YqT+xfoeLITJEIvG5sima+YTan jHRbZr2EeXq6oAcYsqihICFoyJJx0rJWfJaw+cnK8HJBbvii6D7X95oqiEhuEhQj0PS+ b7cQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=BAA9Si32; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=collabora.com Return-Path: Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id f21-20020aa7d855000000b00435dde2e2c4si9303985eds.510.2022.07.01.10.17.01; Fri, 01 Jul 2022 10:17:26 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=BAA9Si32; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=collabora.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230308AbiGAQkw (ORCPT + 99 others); Fri, 1 Jul 2022 12:40:52 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35248 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229906AbiGAQkv (ORCPT ); Fri, 1 Jul 2022 12:40:51 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8926044753; Fri, 1 Jul 2022 09:40:49 -0700 (PDT) Received: from notapiano (unknown [193.27.14.116]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-256) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: nfraprado) by madras.collabora.co.uk (Postfix) with ESMTPSA id 3A2C666015DA; Fri, 1 Jul 2022 17:40:45 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1656693647; bh=0LN1nCFHY1IULTVl6FBa/H7bg/S9tIWVbV69kp8VbnA=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=BAA9Si32fplazkxh8kicyhndXMgFsW4Iwzx/0yfMwj67OTUL7wGYE4ZQyAZnKtqEO iT6m6YdR/rwyrKrIVNJcb57lJfZpOyjXfncsoT+IT9UxEBvedDLpkq9nwO5uAgNMei frFMUE0Bv7Re8x2+qC0kdXny9jG3ke/Az7B41EdbKURPBmFxbOGUxYFJeVOB0UJitA 9iHPk+xxmpLp1txmzqZnuny6BoeNZZZP/hkMeo8lcfWvugQrYTeDsBht/2Dg1yPSCv Z9EeIdYXw6QCIoY/+/9UIbFEic6Ii3YwQ8Ddet0J7HWLVzn/pSaglY9OEyFrQ4muXF XEBBetMaCs1Yw== Date: Fri, 1 Jul 2022 12:40:41 -0400 From: =?utf-8?B?TsOtY29sYXMgRi4gUi4gQS4=?= Prado To: Allen-KH Cheng Cc: Matthias Brugger , Rob Herring , Krzysztof Kozlowski , Chun-Kuang Hu , Philipp Zabel , David Airlie , Daniel Vetter , Project_Global_Chrome_Upstream_Group@mediatek.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, Chen-Yu Tsai Subject: Re: [PATCH v2 4/6] arm64: dts: mt8192: Add display nodes Message-ID: <20220701164041.rbt3idraawafubcf@notapiano> References: <20220701090547.21429-1-allen-kh.cheng@mediatek.com> <20220701090547.21429-5-allen-kh.cheng@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20220701090547.21429-5-allen-kh.cheng@mediatek.com> X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Jul 01, 2022 at 05:05:45PM +0800, Allen-KH Cheng wrote: > Add display nodes and gce info for mt8192 SoC. > > GCE (Global Command Engine) properties to the display nodes in order to > enable the usage of the CMDQ (Command Queue), which is required for > operating the display. > > Signed-off-by: Allen-KH Cheng > Reviewed-by: AngeloGioacchino Del Regno > Reviewed-by: N?colas F. R. A. Prado > --- > arch/arm64/boot/dts/mediatek/mt8192.dtsi | 137 +++++++++++++++++++++++ > 1 file changed, 137 insertions(+) > > diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi > index a789b7c9b2af..c4dc8777f26c 100644 > --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi > +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi [..] > + rdma4: rdma@14015000 { > + compatible = "mediatek,mt8192-disp-rdma"; You added the fallback compatible on rdma0 but missing it on this node. Thanks, N?colas > + reg = <0 0x14015000 0 0x1000>; > + interrupts = ; > + power-domains = <&spm MT8192_POWER_DOMAIN_DISP>; > + clocks = <&mmsys CLK_MM_DISP_RDMA4>; > + iommus = <&iommu0 M4U_PORT_L1_DISP_RDMA4>; > + mediatek,rdma-fifo-size = <2048>; > + mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0x5000 0x1000>; > + }; > + > dpi0: dpi@14016000 { > compatible = "mediatek,mt8192-dpi"; > reg = <0 0x14016000 0 0x1000>; > -- > 2.18.0 > >