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From:   Tony Luck <tony.luck@intel.com>
To:     yazen.ghannam@amd.com
Cc:     tony.luck@intel.com, bp@alien8.de, linux-kernel@vger.kernel.org,
        patches@lists.linux.dev, x86@kernel.org
Subject: [PATCH] RAS/CEC: Reduce offline page threshold for Intel systems
Date:   Fri,  1 Jul 2022 12:12:39 -0700
Message-Id: <20220701191239.619940-1-tony.luck@intel.com>
In-Reply-To: <a871b8bd35604921b842dcd65aed0f6c@intel.com>
References: <a871b8bd35604921b842dcd65aed0f6c@intel.com>
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A large scale study of memory errors on Intel systems in data centers
showed that aggressively taking pages with corrected errors offline is
the best strategy of using corrected errors as a predictor of future
uncorrected errors.

It is unknown whether this would help other vendors. There are some
indicators that it would not.

Set the threshold to "2" on Intel systems.

Do-not-apply-without-agreement-from-AMD
Signed-off-by: Tony Luck <tony.luck@intel.com>
---
 drivers/ras/cec.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/drivers/ras/cec.c b/drivers/ras/cec.c
index 42f2fc0bc8a9..b1fc193b2036 100644
--- a/drivers/ras/cec.c
+++ b/drivers/ras/cec.c
@@ -556,6 +556,14 @@ static int __init cec_init(void)
 	if (ce_arr.disabled)
 		return -ENODEV;
 
+	/*
+	 * Intel systems may avoid uncorreectable errors
+	 * if pages with corrected errors are aggresively
+	 * taken offline.
+	 */
+	if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL)
+		action_threshold = 2;
+
 	ce_arr.array = (void *)get_zeroed_page(GFP_KERNEL);
 	if (!ce_arr.array) {
 		pr_err("Error allocating CE array page!\n");
-- 
2.35.3