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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Lars Povlsen , Steen Hegelund , Microchip Linux Driver Support , Linus Walleij , Wolfram Sang , Terry Bowman , katie.morris@in-advantage.com Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM, RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Jul 1, 2022 at 9:26 PM Colin Foster wrote: > > There are a few Ocelot chips that contain the logic for this bus, but are > controlled externally. Specifically the VSC7511, 7512, 7513, and 7514. In > the externally controlled configurations these registers are not > memory-mapped. > > Add support for these non-memory-mapped configurations. ... > + phy_regmap = ocelot_regmap_from_resource_optional(pdev, 1, > + &mscc_miim_phy_regmap_config); > + if (IS_ERR(phy_regmap)) { > + dev_err(dev, "Unable to create phy register regmap\n"); > + return PTR_ERR(phy_regmap); return dev_err_probe(...); ? > } -- With Best Regards, Andy Shevchenko