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Date:   Fri, 1 Jul 2022 18:42:39 -0400
From:   =?utf-8?B?TsOtY29sYXMgRi4gUi4gQS4=?= Prado 
        <nfraprado@collabora.com>
To:     AngeloGioacchino Del Regno 
        <angelogioacchino.delregno@collabora.com>
Cc:     robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org,
        matthias.bgg@gmail.com, hsinyi@chromium.org,
        allen-kh.cheng@mediatek.com, gtk3@inbox.ru, luca@z3ntu.xyz,
        sam.shih@mediatek.com, sean.wang@mediatek.com,
        devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
        linux-arm-kernel@lists.infradead.org,
        linux-mediatek@lists.infradead.org, wenst@chromium.org
Subject: Re: [PATCH 07/11] arm64: dts: mediatek: cherry: Enable I2C and SPI
 controllers
Message-ID: <20220701224239.n3o4ofzsnvpbdytg@notapiano>
References: <20220630153316.308767-1-angelogioacchino.delregno@collabora.com>
 <20220630153316.308767-8-angelogioacchino.delregno@collabora.com>
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In-Reply-To: <20220630153316.308767-8-angelogioacchino.delregno@collabora.com>
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On Thu, Jun 30, 2022 at 05:33:12PM +0200, AngeloGioacchino Del Regno wrote:
> This platform uses eight I2C controllers and one SPI controller:
> in preparation for enabling devices attached to these controllers,
> add basic configuration to enable the busses.
> 
> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
> ---
>  .../boot/dts/mediatek/mt8195-cherry.dtsi      | 150 ++++++++++++++++++
>  1 file changed, 150 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
> index 2f70341bba91..23a86d07274c 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
> @@ -9,6 +9,13 @@
>  
>  / {
>  	aliases {
> +		i2c0 = &i2c0;
> +		i2c1 = &i2c1;
> +		i2c2 = &i2c2;
> +		i2c3 = &i2c3;
> +		i2c4 = &i2c4;
> +		i2c5 = &i2c5;
> +		i2c7 = &i2c7;
>  		mmc0 = &mmc0;
>  		serial0 = &uart0;
>  	};
> @@ -88,6 +95,65 @@ ppvar_sys: regulator-ppvar-sys {
>  	};
>  };
>  
> +&i2c0 {
> +	status = "okay";
> +
> +	clock-frequency = <400000>;
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&i2c0_pin>;

Very nitpicky: you could name it "i2c0_pins" to be consistent with the others
(including SPI on this patch).

> +};
[..]
> +&i2c7 {
> +	#address-cells = <1>;
> +	#size-cells = <0>;

These *-cells are already defined in the parent dtsi, so drop.

Reviewed-by: N?colas F. R. A. Prado <nfraprado@collabora.com>

Thanks,
N?colas