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Date:   Fri, 1 Jul 2022 18:45:41 -0400
From:   =?utf-8?B?TsOtY29sYXMgRi4gUi4gQS4=?= Prado 
        <nfraprado@collabora.com>
To:     AngeloGioacchino Del Regno 
        <angelogioacchino.delregno@collabora.com>
Cc:     robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org,
        matthias.bgg@gmail.com, hsinyi@chromium.org,
        allen-kh.cheng@mediatek.com, gtk3@inbox.ru, luca@z3ntu.xyz,
        sam.shih@mediatek.com, sean.wang@mediatek.com,
        devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
        linux-arm-kernel@lists.infradead.org,
        linux-mediatek@lists.infradead.org, wenst@chromium.org
Subject: Re: [PATCH 09/11] arm64: dts: mediatek: cherry: Enable MT6360
 sub-pmic on I2C7
Message-ID: <20220701224541.nyjpv6fjs6ge6p4m@notapiano>
References: <20220630153316.308767-1-angelogioacchino.delregno@collabora.com>
 <20220630153316.308767-10-angelogioacchino.delregno@collabora.com>
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On Thu, Jun 30, 2022 at 05:33:14PM +0200, AngeloGioacchino Del Regno wrote:
> All devices of the Cherry platform have a MT6360 sub-pmic,
> providing two LDOs. Add the required node to enable the PMIC
> but without regulators yet, as these will be added in a
> later commit.
> 
> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
> ---
>  .../boot/dts/mediatek/mt8195-cherry.dtsi      | 20 +++++++++++++++++++
>  1 file changed, 20 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
> index 379d0e5c4055..1668aa1be373 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
> @@ -161,6 +161,18 @@ &i2c7 {
>  	clock-frequency = <400000>;
>  	pinctrl-names = "default";
>  	pinctrl-0 = <&i2c7_pin>;
> +
> +	pmic@34 {
> +		#interrupt-cells = <2>;

The binding says this should be 1.

Otherwise,

Reviewed-by: N?colas F. R. A. Prado <nfraprado@collabora.com>

Thanks,
N?colas