Received: by 2002:ac0:de83:0:0:0:0:0 with SMTP id b3csp1336783imk; Mon, 4 Jul 2022 00:33:29 -0700 (PDT) X-Google-Smtp-Source: AGRyM1sumdV7j00met5MT3gaV0rE3z70dEZBPoguDL9zhgKVDADRQoJ+h3pX6TceXbCxqpKifUNy X-Received: by 2002:a17:90b:4d81:b0:1ed:50e2:8547 with SMTP id oj1-20020a17090b4d8100b001ed50e28547mr33833797pjb.169.1656920008912; Mon, 04 Jul 2022 00:33:28 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1656920008; cv=none; d=google.com; s=arc-20160816; b=hRoiXLJutIAnnQGXkzfvMcpZTWa+05ozWMsqJrkvk/X+qwrxdIs695ImhsmKguGJdp zytDrFzPRsBso6hM+EgiYmvlYprxr+hXzZ2AaawxK7qYcsMiULz/kyHoZWdIaY3Llqvm MFWfhKjKG8DRhFC2ihtv9hxsVM6RpUaeihQBmFyVBxqiU8HxC0so3o/D5AvRkEXo1pvw KcL63S4ThbOyqvtbkFVVtZ0IdmzXAMDXELFFcKIyt2jhbVztZOASZ8O4yMmAV0awuk7z VB4SfrUUaTpUglrtrA7IjEMjr9C5X0+xQAMBPXnftefQNyo5Jo/qWSVPSiItlsK6/QFZ TEHg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:user-agent :content-transfer-encoding:references:in-reply-to:date:cc:to:from :subject:message-id:dkim-signature; bh=ckiIuQlZkyJMJSzwuYxy718PGGKJWRjCr2xadM8M3oo=; b=KhWJc5pLv+YKeVxk+oh3AWUWEDJKTbNlZOBFxQ6idGLE6olbXW7+Q2OJZorS98oyhh +7PK2Kg51k85u2UZkOZCbhoHx2AU2fMokd/EMWzrOCGoR8uTG6uO+4DqzWV2bARH+71J kzHBEIfHeCZeRPhzKOA/dMc8zKTTo1zj7S7LoyhutQPsBlViZBDTNO9Mp5if8vasc0wj kvgLUNqhAkyzsrYU0Wk/WdMAhEX5nMUr/IdeVDMkEGWVtcHwtkQsBeB3n4cvvBIuaJgA CLiDtb2CzkZcQpVFrPH+NPvOp7hIzZhqXzaPYy0sAYYKYZeuqaRb1unnD6jp2n8RLTP/ sV/Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b="Y/0nIuBA"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Return-Path: Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id q10-20020a170902daca00b001640ab1545fsi22131394plx.596.2022.07.04.00.33.17; Mon, 04 Jul 2022 00:33:28 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b="Y/0nIuBA"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232981AbiGDGoW (ORCPT + 99 others); Mon, 4 Jul 2022 02:44:22 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51638 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232847AbiGDGoT (ORCPT ); Mon, 4 Jul 2022 02:44:19 -0400 Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6DF5A3899; Sun, 3 Jul 2022 23:44:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1656917058; x=1688453058; h=message-id:subject:from:to:cc:date:in-reply-to: references:content-transfer-encoding:mime-version; bh=kyif9vtz4zkl0pkVYJ151CZ4mMtl2C5MaCwh4sjRy0Q=; b=Y/0nIuBAyBVfL0KRFQbNr39RUD/hfOV0byaua8ab62hRG4yXP5c0BjRi c1/8B1GDH0oq2IFq1pnOQXGrCvyO8Cj6Ha8Zz1tH75xZ1eOqdsRSh2qfo ksTmrFzD886Ldro/zu0cr7u/HTnGebdDGffxtZw2N0k20VE12XKclWk3Y FWYhFW2OI0liDCpmyyLELVpDc+kOvfmnIjytXy6RA99S9Vzhs3/HOPlaI Je2BHRtq79o0Zn6t5laymV8S/QcV3hshzwelVDFDXS4watfe4aQ+5hUOP 0Et80wIPHt6Tm0CK0dfi7pmon7FWrpr15aDV5OmcBkpdYPycha0o94DyC A==; X-IronPort-AV: E=McAfee;i="6400,9594,10397"; a="266074640" X-IronPort-AV: E=Sophos;i="5.92,243,1650956400"; d="scan'208";a="266074640" Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Jul 2022 23:44:17 -0700 X-IronPort-AV: E=Sophos;i="5.92,243,1650956400"; d="scan'208";a="592370977" Received: from fzafar-mobl3.amr.corp.intel.com (HELO khuang2-desk.gar.corp.intel.com) ([10.212.123.22]) by orsmga002-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Jul 2022 23:44:14 -0700 Message-ID: Subject: Re: [PATCH v7 012/102] KVM: x86: Introduce vm_type to differentiate default VMs from confidential VMs From: Kai Huang To: isaku.yamahata@intel.com, kvm@vger.kernel.org, linux-kernel@vger.kernel.org Cc: isaku.yamahata@gmail.com, Paolo Bonzini , Sean Christopherson , Xiaoyao Li Date: Mon, 04 Jul 2022 18:44:12 +1200 In-Reply-To: <3c5d4e38b631a921006e44551fe1249339393e41.camel@intel.com> References: <5979d880dc074c7fa57e02da34a41a6905ebd89d.1656366338.git.isaku.yamahata@intel.com> <3c5d4e38b631a921006e44551fe1249339393e41.camel@intel.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.44.2 (3.44.2-1.fc36) MIME-Version: 1.0 X-Spam-Status: No, score=-2.8 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE, SPF_NONE,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, 2022-06-28 at 14:52 +1200, Kai Huang wrote: > On Mon, 2022-06-27 at 14:53 -0700, isaku.yamahata@intel.com wrote: > > From: Sean Christopherson > >=20 > > Unlike default VMs, confidential VMs (Intel TDX and AMD SEV-ES) don't a= llow > > some operations (e.g., memory read/write, register state access, etc). > >=20 > > Introduce vm_type to track the type of the VM to x86 KVM. Other arch K= VMs > > already use vm_type, KVM_INIT_VM accepts vm_type, and x86 KVM callback > > vm_init accepts vm_type. So follow them. Further, a different policy = can > > be made based on vm_type. Define KVM_X86_DEFAULT_VM for default VM as > > default and define KVM_X86_TDX_VM for Intel TDX VM. The wrapper functi= on > > will be defined as "bool is_td(kvm) { return vm_type =3D=3D VM_TYPE_TDX= ; }" > >=20 > > Add a capability KVM_CAP_VM_TYPES to effectively allow device model, > > e.g. qemu, to query what VM types are supported by KVM. This (introduc= e a > > new capability and add vm_type) is chosen to align with other arch KVMs > > that have VM types already. Other arch KVMs uses different name to que= ry > > supported vm types and there is no common name for it, so new name was > > chosen. > >=20 > > Co-developed-by: Xiaoyao Li > > Signed-off-by: Xiaoyao Li > > Signed-off-by: Sean Christopherson > > Signed-off-by: Isaku Yamahata > > Reviewed-by: Paolo Bonzini > > --- > > Documentation/virt/kvm/api.rst | 21 +++++++++++++++++++++ > > arch/x86/include/asm/kvm-x86-ops.h | 1 + > > arch/x86/include/asm/kvm_host.h | 2 ++ > > arch/x86/include/uapi/asm/kvm.h | 3 +++ > > arch/x86/kvm/svm/svm.c | 6 ++++++ > > arch/x86/kvm/vmx/main.c | 1 + > > arch/x86/kvm/vmx/tdx.h | 6 +----- > > arch/x86/kvm/vmx/vmx.c | 5 +++++ > > arch/x86/kvm/vmx/x86_ops.h | 1 + > > arch/x86/kvm/x86.c | 9 ++++++++- > > include/uapi/linux/kvm.h | 1 + > > tools/arch/x86/include/uapi/asm/kvm.h | 3 +++ > > tools/include/uapi/linux/kvm.h | 1 + > > 13 files changed, 54 insertions(+), 6 deletions(-) > >=20 > > diff --git a/Documentation/virt/kvm/api.rst b/Documentation/virt/kvm/ap= i.rst > > index 9cbbfdb663b6..b9ab598883b2 100644 > > --- a/Documentation/virt/kvm/api.rst > > +++ b/Documentation/virt/kvm/api.rst > > @@ -147,10 +147,31 @@ described as 'basic' will be available. > > The new VM has no virtual cpus and no memory. > > You probably want to use 0 as machine type. > > =20 > > +X86: > > +^^^^ > > + > > +Supported vm type can be queried from KVM_CAP_VM_TYPES, which returns = the > > +bitmap of supported vm types. The 1-setting of bit @n means vm type wi= th > > +value @n is supported. >=20 >=20 > Perhaps I am missing something, but I don't understand how the below chan= ges > (except the x86 part above) in Documentation are related to this patch. >=20 > > + > > +S390: > > +^^^^^ > > + > > In order to create user controlled virtual machines on S390, check > > KVM_CAP_S390_UCONTROL and use the flag KVM_VM_S390_UCONTROL as > > privileged user (CAP_SYS_ADMIN). > > =20 > > +MIPS: > > +^^^^^ > > + > > +To use hardware assisted virtualization on MIPS (VZ ASE) rather than > > +the default trap & emulate implementation (which changes the virtual > > +memory layout to fit in user mode), check KVM_CAP_MIPS_VZ and use the > > +flag KVM_VM_MIPS_VZ. > > + > > +ARM64: > > +^^^^^^ > > + > > On arm64, the physical address size for a VM (IPA Size limit) is limit= ed > > to 40bits by default. The limit can be configured if the host supports= the > > extension KVM_CAP_ARM_VM_IPA_SIZE. When supported, use > > diff --git a/arch/x86/include/asm/kvm-x86-ops.h b/arch/x86/include/asm/= kvm-x86-ops.h > > index 75bc44aa8d51..a97cdb203a16 100644 > > --- a/arch/x86/include/asm/kvm-x86-ops.h > > +++ b/arch/x86/include/asm/kvm-x86-ops.h > > @@ -19,6 +19,7 @@ KVM_X86_OP(hardware_disable) > > KVM_X86_OP(hardware_unsetup) > > KVM_X86_OP(has_emulated_msr) > > KVM_X86_OP(vcpu_after_set_cpuid) > > +KVM_X86_OP(is_vm_type_supported) > > KVM_X86_OP(vm_init) > > KVM_X86_OP_OPTIONAL(vm_destroy) > > KVM_X86_OP_OPTIONAL_RET0(vcpu_precreate) > > diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm= _host.h > > index aa11525500d3..089e0a4de926 100644 > > --- a/arch/x86/include/asm/kvm_host.h > > +++ b/arch/x86/include/asm/kvm_host.h > > @@ -1141,6 +1141,7 @@ enum kvm_apicv_inhibit { > > }; > > =20 > > struct kvm_arch { > > + unsigned long vm_type; > > unsigned long n_used_mmu_pages; > > unsigned long n_requested_mmu_pages; > > unsigned long n_max_mmu_pages; > > @@ -1434,6 +1435,7 @@ struct kvm_x86_ops { > > bool (*has_emulated_msr)(struct kvm *kvm, u32 index); > > void (*vcpu_after_set_cpuid)(struct kvm_vcpu *vcpu); > > =20 > > + bool (*is_vm_type_supported)(unsigned long vm_type); > > unsigned int vm_size; > > int (*vm_init)(struct kvm *kvm); > > void (*vm_destroy)(struct kvm *kvm); > > diff --git a/arch/x86/include/uapi/asm/kvm.h b/arch/x86/include/uapi/as= m/kvm.h > > index 50a4e787d5e6..9792ec1cc317 100644 > > --- a/arch/x86/include/uapi/asm/kvm.h > > +++ b/arch/x86/include/uapi/asm/kvm.h > > @@ -531,4 +531,7 @@ struct kvm_pmu_event_filter { > > #define KVM_VCPU_TSC_CTRL 0 /* control group for the timestamp counter= (TSC) */ > > #define KVM_VCPU_TSC_OFFSET 0 /* attribute for the TSC offset */ > > =20 > > +#define KVM_X86_DEFAULT_VM 0 > > +#define KVM_X86_TDX_VM 1 > > + > > #endif /* _ASM_X86_KVM_H */ > > diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c > > index 247c0ad458a0..815a07c594f1 100644 > > --- a/arch/x86/kvm/svm/svm.c > > +++ b/arch/x86/kvm/svm/svm.c > > @@ -4685,6 +4685,11 @@ static void svm_vm_destroy(struct kvm *kvm) > > sev_vm_destroy(kvm); > > } > > =20 > > +static bool svm_is_vm_type_supported(unsigned long type) > > +{ > > + return type =3D=3D KVM_X86_DEFAULT_VM; > > +} > > + > > static int svm_vm_init(struct kvm *kvm) > > { > > if (!pause_filter_count || !pause_filter_thresh) > > @@ -4712,6 +4717,7 @@ static struct kvm_x86_ops svm_x86_ops __initdata = =3D { > > .vcpu_free =3D svm_vcpu_free, > > .vcpu_reset =3D svm_vcpu_reset, > > =20 > > + .is_vm_type_supported =3D svm_is_vm_type_supported, > > .vm_size =3D sizeof(struct kvm_svm), > > .vm_init =3D svm_vm_init, > > .vm_destroy =3D svm_vm_destroy, > > diff --git a/arch/x86/kvm/vmx/main.c b/arch/x86/kvm/vmx/main.c > > index ac788af17d92..7be4941e4c4d 100644 > > --- a/arch/x86/kvm/vmx/main.c > > +++ b/arch/x86/kvm/vmx/main.c > > @@ -43,6 +43,7 @@ struct kvm_x86_ops vt_x86_ops __initdata =3D { > > .hardware_disable =3D vmx_hardware_disable, > > .has_emulated_msr =3D vmx_has_emulated_msr, > > =20 > > + .is_vm_type_supported =3D vmx_is_vm_type_supported, > > .vm_size =3D sizeof(struct kvm_vmx), > > .vm_init =3D vmx_vm_init, > > .vm_destroy =3D vmx_vm_destroy, > > diff --git a/arch/x86/kvm/vmx/tdx.h b/arch/x86/kvm/vmx/tdx.h > > index 54d7a26ed9ee..2f43db5bbefb 100644 > > --- a/arch/x86/kvm/vmx/tdx.h > > +++ b/arch/x86/kvm/vmx/tdx.h > > @@ -17,11 +17,7 @@ struct vcpu_tdx { > > =20 > > static inline bool is_td(struct kvm *kvm) > > { > > - /* > > - * TDX VM type isn't defined yet. > > - * return kvm->arch.vm_type =3D=3D KVM_X86_TDX_VM; > > - */ > > - return false; > > + return kvm->arch.vm_type =3D=3D KVM_X86_TDX_VM; > > } >=20 > If you put this patch before patch: >=20 > [PATCH v7 009/102] KVM: TDX: Add placeholders for TDX VM/vcpu structure >=20 > Then you don't need to introduce this chunk in above patch and then remov= e it > here, which is unnecessary and ugly. >=20 > And you can even only introduce KVM_X86_DEFAULT_VM but not KVM_X86_TDX_VM= in > this patch, so you can make this patch as a infrastructural patch to repo= rt VM > type. The KVM_X86_TDX_VM can come with the patch where is_td() is introd= uced > (in your above patch 9). =C2=A0 >=20 > To me, it's more clean way to write patch. For instance, this infrastruc= tural > patch can be theoretically used by other series if they have similar thin= g to > support, but doesn't need to carry is_td() and KVM_X86_TDX_VM burden that= you > made. Sorry I missed this patch already has Paolo's Reviewed-by. Please feel fre= e to ignore my comments. --=20 Thanks, -Kai