Received: by 2002:ad5:4acb:0:0:0:0:0 with SMTP id n11csp273776imw; Mon, 4 Jul 2022 08:58:32 -0700 (PDT) X-Google-Smtp-Source: AGRyM1sT0ckp5MlW18ntU8Ma/SBX9XUaxGWVphh4SnVzuaW142udpZdC210ZYJlj9WaZpOqT1d1s X-Received: by 2002:a17:906:c152:b0:726:3226:2e61 with SMTP id dp18-20020a170906c15200b0072632262e61mr29959545ejc.122.1656950312702; Mon, 04 Jul 2022 08:58:32 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1656950312; cv=none; d=google.com; s=arc-20160816; b=q9ETjEqJa5K0PO5Fa6VMwg1tcvAX5A1d+XM74lgplt654jK49s58ADGQ8vxANuD73l PJ/ufuSXgDgmGIsyJk43SfgSS9AzD4MHHcOwd2mZ8xqlnns1jQYemM0l7zEVCkAN1dQQ PHDEqh1mGhxBdL7TcdrXeR8ypCzU3fFvu3u1FjaVeqzFRMC7TWVQm8qRLq5ypwRtD514 lDVdd/3CB7bwFrqIj4hKUP5oszOCXGjr+TSehnHqf6OMF3cAuenXTCwfZ5GbN5R8uZNR h7YCnL85a6vfrgrhSEy51SBc5+g7/WsOZxzln5qg6p5Ab37YtMBhmJm6oZRZ9oXBawPl LMyg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:message-id:date:in-reply-to:subject :cc:to:from:references:dkim-signature; bh=3BzrzCAqUiXWdwa7S6mOs7MQCJ+hR2cBiAXIC/nz5OE=; b=08WbTgyPas1NX57Kavum+3zpCwz8Gcsk9fnzIcw5as79frd7t1YVLhBOPWCZMJpGvP y48r04wxW2lgRlOMUVvA4faWNo7LZJ79WVlLwTzQMCVJLTeoaA5kE8uRXFf46dyAdyr+ l9J3Jpo9rdg4s5ZC6eynTkvRCGzmpGAkbFsaDAaGxISYQx2w1buulRRVCR5Evr2UVCHJ MaY3BLXmKm/eb5YVWGoN/x2Wj+CUPpTKd1eWrEPgWjt11yTWgFHkLhTiub6dDk5mTPWH HZ1Ep8W1CUE+w4FQFkexXzqkM71hWonTeDYXSVQ4sonunD51rih5UyzV6jGycol9O3j7 7qrQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gmail.com header.s=20210112 header.b=pEo3A110; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Return-Path: Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id hr30-20020a1709073f9e00b0072402ea9647si10432203ejc.891.2022.07.04.08.58.07; Mon, 04 Jul 2022 08:58:32 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20210112 header.b=pEo3A110; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233786AbiGDPa4 (ORCPT + 99 others); Mon, 4 Jul 2022 11:30:56 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50386 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232402AbiGDPay (ORCPT ); Mon, 4 Jul 2022 11:30:54 -0400 Received: from mail-wr1-x42e.google.com (mail-wr1-x42e.google.com [IPv6:2a00:1450:4864:20::42e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 36FB12B2; Mon, 4 Jul 2022 08:30:52 -0700 (PDT) Received: by mail-wr1-x42e.google.com with SMTP id z12so4379239wrq.7; Mon, 04 Jul 2022 08:30:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=references:from:to:cc:subject:in-reply-to:date:message-id :mime-version; bh=3BzrzCAqUiXWdwa7S6mOs7MQCJ+hR2cBiAXIC/nz5OE=; b=pEo3A110eDqe0C8fZ2+kIYAscnijme2LDYY4W9SYLg3HEP1ew2OKYFPb5jvbKbkSOB PsMGM00wZ9TCvy7UbShPR1UxOih3axNw0Covf9GPi8fsjh2v2QtL9Y6m6KyTguH2FHRG iB1sSsljaf/L4txOHmD6XmIGV/v+vYT08/+5gAxcUTILTbDTbQyH+KzzP8Ihc6N/6BU8 GGAg+1yRFrtDZ9/Xd080gMOZNbsHFk1KMdZZL1TJjgVrj09/BCUlg/5OkVCHYLWQ5a59 igHwAcaZF5kY5//Si1I77xUZ/hAk8XON3trBVWs5+lEzn0a25b61CupPrRuXykSH7wSe Wl6A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:references:from:to:cc:subject:in-reply-to:date :message-id:mime-version; bh=3BzrzCAqUiXWdwa7S6mOs7MQCJ+hR2cBiAXIC/nz5OE=; b=y/RLzwD4ykjGlhzbavjcx/ExOiuS/eSsT+jB4zpuFmn5obI+hvXdP5lGJqngVgmEue nxbbFb+Ir6da1fxp/eJu34oZan0Pk+QiU6HpxHj4LWDSOCjJaZd3uEYSGywnvWN7nyIB uqkIqZ7/CezQjoBv2Uw6b7wKBqhyKiXUzjTWPXYF4AS9rhCqqCxkjkKSG7lJEXXFsugb tbj0tbOCJjYpqL/cZJ3oLMERCase4yXGjOto1qverf38C+20V1UQb9TOAY643Z5sZtRf LCNhpXMbRCniQpJDJa4txv4MwaDBdIefKBFyjI8yY5WyX2KPHi79jHtlAYWPziILhXP+ LQmg== X-Gm-Message-State: AJIora+xRVOgHWcGc/7hZ1j0cWTFesUiOcbb+58dErVMds65ypSK4GCu SJIu3MPhdcmI2Yq1rUF6eoY= X-Received: by 2002:adf:d1e8:0:b0:21b:b7dc:68e with SMTP id g8-20020adfd1e8000000b0021bb7dc068emr26489317wrd.683.1656948650618; Mon, 04 Jul 2022 08:30:50 -0700 (PDT) Received: from localhost (92.40.202.9.threembb.co.uk. [92.40.202.9]) by smtp.gmail.com with ESMTPSA id q5-20020adff945000000b0021b9585276dsm29921287wrr.101.2022.07.04.08.30.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 04 Jul 2022 08:30:49 -0700 (PDT) References: <20220703111057.23246-1-aidanmacdonald.0x0@gmail.com> <20220703111057.23246-3-aidanmacdonald.0x0@gmail.com> From: Aidan MacDonald To: Andy Shevchenko Cc: Michael Walle , Linus Walleij , Bartosz Golaszewski , "open list:GPIO SUBSYSTEM" , Linux Kernel Mailing List Subject: Re: [PATCH 2/3] gpio: regmap: Support combined GPIO and pin control drivers In-reply-to: Date: Mon, 04 Jul 2022 16:31:57 +0100 Message-ID: MIME-Version: 1.0 Content-Type: text/plain X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_ENVFROM_END_DIGIT, FREEMAIL_FROM,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Andy Shevchenko writes: > On Sun, Jul 3, 2022 at 1:11 PM Aidan MacDonald > wrote: >> >> Allow gpio-regmap to be used for the GPIO portion of a combined >> pin control and GPIO driver by setting the has_pinctrl flag. This >> flag will cause GPIO direction set ops to be implemented as calls >> to pinctrl_gpio_direction_input/output() instead of updating the >> direction set registers directly. >> >> Note that reg_dir_out/in_base is still required for implementing >> the GPIO chip's ->get_direction() callback. > > ... > >> + /* >> + * we need a direction register for implementing ->get_direction >> + * even if ->direction_input/output is handled by pin control >> + */ > > /* > * Multi-line comments go with this format > * or style. Pay attention to the capitalization > * and English grammar, e.g. period at the end of sentence(s). > */ > I used this "style" to match the surrounding code, but I suppose I might as well fix the other comments while I'm here. >> + if (config->has_pinctrl && !(config->reg_dir_in_base || >> + config->reg_dir_out_base)) > > Can you re-indent this either to be one line or put the second part of > the conditional onto the second line? Yep. > > And why not use && everywhere? > No reason to be honest, but maybe it's easier to understand? "has pin control and doesn't set reg_dir_in_base or reg_dir_out_base". Using && is more like this: "has pin control, doesn't set reg_dir_in_base, and doesn't set reg_dir_out_base".