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Message-ID: <8a423377-a181-2f41-6c11-a0e2b0d46c92@linaro.org>
Date:   Tue, 5 Jul 2022 16:07:59 +0300
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Subject: Re: [PATCH 13/14] arm64: dts: qcom: msm8996: use non-empty ranges for
 PCIe PHYs
Content-Language: en-GB
To:     Johan Hovold <johan+linaro@kernel.org>,
        Bjorn Andersson <bjorn.andersson@linaro.org>
Cc:     Andy Gross <agross@kernel.org>, Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
        linux-kernel@vger.kernel.org
References: <20220705114032.22787-1-johan+linaro@kernel.org>
 <20220705114032.22787-14-johan+linaro@kernel.org>
From:   Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
In-Reply-To: <20220705114032.22787-14-johan+linaro@kernel.org>
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Precedence: bulk

On 05/07/2022 14:40, Johan Hovold wrote:
> Clean up the PCIe PHY nodes by using a non-empty ranges property.

A matter of taste, but nevertheless:

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>

> 
> Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
> ---
>   arch/arm64/boot/dts/qcom/msm8996.dtsi | 26 +++++++++++++-------------
>   1 file changed, 13 insertions(+), 13 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi
> index b670d0412760..16869bb7d625 100644
> --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
> +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
> @@ -590,7 +590,7 @@ pcie_phy: phy@34000 {
>   			reg = <0x00034000 0x488>;
>   			#address-cells = <1>;
>   			#size-cells = <1>;
> -			ranges;
> +			ranges = <0x0 0x00034000 0x4000>;
>   
>   			clocks = <&gcc GCC_PCIE_PHY_AUX_CLK>,
>   				<&gcc GCC_PCIE_PHY_CFG_AHB_CLK>,
> @@ -603,10 +603,10 @@ pcie_phy: phy@34000 {
>   			reset-names = "phy", "common", "cfg";
>   			status = "disabled";
>   
> -			pciephy_0: phy@35000 {
> -				reg = <0x00035000 0x130>,
> -				      <0x00035200 0x200>,
> -				      <0x00035400 0x1dc>;
> +			pciephy_0: phy@1000 {
> +				reg = <0x1000 0x130>,
> +				      <0x1200 0x200>,
> +				      <0x1400 0x1dc>;
>   				#phy-cells = <0>;
>   
>   				#clock-cells = <0>;
> @@ -617,10 +617,10 @@ pciephy_0: phy@35000 {
>   				reset-names = "lane0";
>   			};
>   
> -			pciephy_1: phy@36000 {
> -				reg = <0x00036000 0x130>,
> -				      <0x00036200 0x200>,
> -				      <0x00036400 0x1dc>;
> +			pciephy_1: phy@2000 {
> +				reg = <0x2000 0x130>,
> +				      <0x2200 0x200>,
> +				      <0x2400 0x1dc>;
>   				#phy-cells = <0>;
>   
>   				#clock-cells = <0>;
> @@ -631,10 +631,10 @@ pciephy_1: phy@36000 {
>   				reset-names = "lane1";
>   			};
>   
> -			pciephy_2: phy@37000 {
> -				reg = <0x00037000 0x130>,
> -				      <0x00037200 0x200>,
> -				      <0x00037400 0x1dc>;
> +			pciephy_2: phy@3000 {
> +				reg = <0x3000 0x130>,
> +				      <0x3200 0x200>,
> +				      <0x3400 0x1dc>;
>   				#phy-cells = <0>;
>   
>   				#clock-cells = <0>;


-- 
With best wishes
Dmitry