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Tue, 5 Jul 2022 14:00:37 +0000 Received: from DU2PR04MB8774.eurprd04.prod.outlook.com ([fe80::5c49:dd85:a8d0:2907]) by DU2PR04MB8774.eurprd04.prod.outlook.com ([fe80::5c49:dd85:a8d0:2907%3]) with mapi id 15.20.5395.021; Tue, 5 Jul 2022 14:00:37 +0000 From: Han Xu To: Krzysztof Kozlowski , Bough Chen , "ashish.kumar@nxp.com" , "yogeshgaur.83@gmail.com" , "broonie@kernel.org" , "robh+dt@kernel.org" , "krzysztof.kozlowski+dt@linaro.org" , "singh.kuldeep87k@gmail.com" , "tudor.ambarus@microchip.com" , "p.yadav@ti.com" , "michael@walle.cc" , "miquel.raynal@bootlin.com" , "richard@nod.at" , "vigneshr@ti.com" , "shawnguo@kernel.org" , "s.hauer@pengutronix.de" , "kernel@pengutronix.de" CC: "linux-spi@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "devicetree@vger.kernel.org" , "linux-mtd@lists.infradead.org" , "festevam@gmail.com" , dl-linux-imx , "linux-arm-kernel@lists.infradead.org" , "zhengxunli@mxic.com.tw" Subject: RE: [PATCH 07/11] dt-bindings: spi: spi-nxp-fspi: add a new property nxp,fspi-dll-slvdly Thread-Topic: [PATCH 07/11] dt-bindings: spi: spi-nxp-fspi: add a new property nxp,fspi-dll-slvdly Thread-Index: AQHYkFF0qJujufsOTUOD0eIhHoBTUq1viBIAgAALOQCAAAJgAIAAKZ1ggAAGgYCAAAdCYA== Date: Tue, 5 Jul 2022 14:00:37 +0000 Message-ID: References: <1657012303-6464-1-git-send-email-haibo.chen@nxp.com> <1657012303-6464-7-git-send-email-haibo.chen@nxp.com> <59d360ef-5374-c7a7-2995-854ab3715b25@linaro.org> In-Reply-To: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=nxp.com; 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: DU2PR04MB8774.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: a5fd2f1a-8373-4ad0-2e9a-08da5e8ebd16 X-MS-Exchange-CrossTenant-originalarrivaltime: 05 Jul 2022 14:00:37.6748 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: bCwaOY20+9RpApNwbl/jfdpVrk8jRvU4ldeBc9payoShnsE3sLN4N4HWXWF5Ps+d X-MS-Exchange-Transport-CrossTenantHeadersStamped: DU2PR04MB8821 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org >-----Original Message----- >From: Krzysztof Kozlowski >Sent: Tuesday, July 5, 2022 8:29 AM >To: Han Xu ; Bough Chen ; >ashish.kumar@nxp.com; yogeshgaur.83@gmail.com; broonie@kernel.org; >robh+dt@kernel.org; krzysztof.kozlowski+dt@linaro.org; >singh.kuldeep87k@gmail.com; tudor.ambarus@microchip.com; p.yadav@ti.com; >michael@walle.cc; miquel.raynal@bootlin.com; richard@nod.at; vigneshr@ti.c= om; >shawnguo@kernel.org; s.hauer@pengutronix.de; kernel@pengutronix.de >Cc: linux-spi@vger.kernel.org; linux-kernel@vger.kernel.org; >devicetree@vger.kernel.org; linux-mtd@lists.infradead.org; festevam@gmail.= com; >dl-linux-imx ; linux-arm-kernel@lists.infradead.org; >zhengxunli@mxic.com.tw >Subject: Re: [PATCH 07/11] dt-bindings: spi: spi-nxp-fspi: add a new prope= rty >nxp,fspi-dll-slvdly > >On 05/07/2022 15:19, Han Xu wrote: >>>>>> + nxp,fspi-dll-slvdly: >>>>>> + $ref: /schemas/types.yaml#/definitions/uint32 >>>>>> + description: | >>>>>> + Specify the DLL slave line delay value. >>>>> >>>>> What are the units? >>>> >>>> Do you mean here need to give more detail explain about this properity= ? >>>> >>>> How about change like this? >>>> Specify the DLL slave line delay value. The delay target for slave = delay line is: >>> ((nxp,fspi-dll-slvdly+1) * 1/32 * clock cycle of reference clock (seria= l root clock). >>> >>> This would be good. >>> >>>> The range of this value is 0~16. >>> >>> This needs to go to schema instead as "maximum: 16". >>> >>> But still the question is - what are the units used in this "delay"? ms= ? us? >> >> HI Krzysztof, >> >> According to the formula, the range should be 0~15, 16 should do nothing= or no >delay. > >Sure, just add some constraint. > >> >> The unit should be clock phase. In other words, the delay can be in rang= e of >1/32~1/2 clock cycle. > >So we probably misunderstood each other... looking at the driver it also e= xplains >the confusing. You encoded here register value which is pretty often wrong >approach. > >This should be instead meaningful value for the user of the bindings, so u= sually >using one of property units: >https://eur01.safelinks.protection.outlook.com/?url=3Dhttps%3A%2F%2Fgithub= .com >%2Fdevicetree-org%2Fdt- >schema%2Fblob%2Fmain%2Fdtschema%2Fschemas%2Fproperty- >units.yaml&data=3D05%7C01%7Chan.xu%40nxp.com%7C0ffe3d706e064f14382 >108da5e8a5add%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C6379262 >45564450475%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV >2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&sdata=3DQ4 >SfVnBN%2BQ0vYKJzRf%2FXZkCA1WGyPV9doFcb%2BLSKx4w%3D&reserved=3D0 > >I think you could use here clock cycles or clock phase, but then it has to= be obvious >it is that unit. Hi Krzysztof,=20 Let me clarify it, in the document a term "delay cell" was used to descript= this register bit. Each delay cell equals "1/32 clock phase", so the unit = of delay cell is clock phase. The value user need set in DT just number to = define how many delay cells needed. > >Best regards, >Krzysztof