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Date:   Tue, 5 Jul 2022 09:52:49 -0500
From:   Han Xu <han.xu@nxp.com>
To:     Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Cc:     Michael Walle <michael@walle.cc>, Bough Chen <haibo.chen@nxp.com>,
        ashish.kumar@nxp.com, yogeshgaur.83@gmail.com, broonie@kernel.org,
        robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org,
        singh.kuldeep87k@gmail.com, tudor.ambarus@microchip.com,
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        dl-linux-imx <linux-imx@nxp.com>,
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Subject: Re: [PATCH 07/11] dt-bindings: spi: spi-nxp-fspi: add a new property
 nxp,fspi-dll-slvdly
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On 22/07/05 04:12PM, Krzysztof Kozlowski wrote:
> On 05/07/2022 16:06, Michael Walle wrote:
> > 
> >>>
> >>> I think you could use here clock cycles or clock phase, but then it 
> >>> has to be obvious
> >>> it is that unit.
> >>
> >> Hi Krzysztof,
> >>
> >> Let me clarify it, in the document a term "delay cell" was used to
> >> descript this register bit. Each delay cell equals "1/32 clock phase",
> >> so the unit of delay cell is clock phase. The value user need set in
> >> DT just number to define how many delay cells needed.
> > 
> > Then should the unit be "-degrees" and the possible range 0-180?
> 
> Thanks. We don't have it documented currently, but the unit seems
> reasonable.

IMO, use the unit "-degrees" makes it more complicate. Personaly I would
calculate how many clock cycle delay needed, such as 1/4 clock cycle or half
clock cycle. Using degree brings extra calculation.

The granularity of the clock phase change is 1/32 of 180 degree, but the range
0-180 make people feel it can be set in any degree in range.

If I describe all details of the relation between "nxp,fspi-dll-slvdly" and
"delay cell" in patch v2, do you think it's clear for users?

> 
> Best regards,
> Krzysztof