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[2620:137:e000::1:20]) by mx.google.com with ESMTP id r17-20020a634411000000b00408d94d8198si12018129pga.119.2022.07.05.21.00.34; Tue, 05 Jul 2022 21:00:45 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@marvell.com header.s=pfpt0220 header.b=brdiw45h; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=REJECT dis=NONE) header.from=marvell.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231641AbiGFDpu (ORCPT + 99 others); Tue, 5 Jul 2022 23:45:50 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48102 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231208AbiGFDpX (ORCPT ); Tue, 5 Jul 2022 23:45:23 -0400 Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 115BA1E3E8; Tue, 5 Jul 2022 20:45:19 -0700 (PDT) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 2660SlQa031148; Tue, 5 Jul 2022 20:45:01 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=3lYvUQoTmTjkAs56lnmS9faieyYzZgKuft6vEQD4x8s=; b=brdiw45hfnQcgNszdQwFtbeM0NgkQSBs7f80noSoxCpvL9XtHy4XEblMagpd0cmILdkE i1xHXw9FIi7mrlGeSWbn52kQmFkDAco12S7wYQPXk7JXdielU5GCpgsjXWwk5bCZVvF2 GpavWs6xzFlkTS6PiaoHaROyLvwh4KUrrLcSdLTChABi7eoKp4loU0KzoN9jQKMJFiNy vG+9mKzXuV+8zriSgml+1h8AIBaRkIqCoU1KE142F+M9C+ISlmJaHAMdA2+OCTT9VhAU E3AaQvhJoFRWqOfKwYswn9kkuRvnMGg41alEkx8Ua1SXBq9ImZ9Aw6PA7oNQUIkFRHkE Sw== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3h4yvr0hp0-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Tue, 05 Jul 2022 20:45:01 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 5 Jul 2022 20:44:59 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Tue, 5 Jul 2022 20:44:59 -0700 Received: from IPBU-BLR-SERVER1.marvell.com (IPBU-BLR-SERVER1.marvell.com [10.28.8.41]) by maili.marvell.com (Postfix) with ESMTP id E2F615B693D; Tue, 5 Jul 2022 20:44:56 -0700 (PDT) From: Ratheesh Kannoth To: , CC: , , , , , Ratheesh Kannoth Subject: [PATCH V1 04/12] octeontx2-af: devlink configuration support Date: Wed, 6 Jul 2022 09:14:34 +0530 Message-ID: <20220706034442.2308670-5-rkannoth@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220706034442.2308670-1-rkannoth@marvell.com> References: <20220706034442.2308670-1-rkannoth@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-GUID: yBomJiymua9gKs2DreIEy6GdtXnJiKC- X-Proofpoint-ORIG-GUID: yBomJiymua9gKs2DreIEy6GdtXnJiKC- X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.883,Hydra:6.0.517,FMLib:17.11.122.1 definitions=2022-07-06_02,2022-06-28_01,2022-06-22_01 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org CN10KB silicon supports Exact match feature. This feature can be disabled through devlink configuration. Devlink command fails if DMAC filter rules are already present. Once disabled, legacy RPM based DMAC filters will be configured. Signed-off-by: Ratheesh Kannoth --- .../marvell/octeontx2/af/rvu_devlink.c | 71 ++++++++++++++++++- .../marvell/octeontx2/af/rvu_npc_hash.c | 28 ++++++++ .../marvell/octeontx2/af/rvu_npc_hash.h | 3 + 3 files changed, 100 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c index d0ab8f233a02..88dee589cb21 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c +++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c @@ -10,6 +10,7 @@ #include "rvu.h" #include "rvu_reg.h" #include "rvu_struct.h" +#include "rvu_npc_hash.h" #define DRV_NAME "octeontx2-af" @@ -1436,14 +1437,75 @@ static int rvu_af_dl_dwrr_mtu_get(struct devlink *devlink, u32 id, enum rvu_af_dl_param_id { RVU_AF_DEVLINK_PARAM_ID_BASE = DEVLINK_PARAM_GENERIC_ID_MAX, RVU_AF_DEVLINK_PARAM_ID_DWRR_MTU, + RVU_AF_DEVLINK_PARAM_ID_NPC_EXACT_FEATURE_DISABLE, }; +static int rvu_af_npc_exact_feature_get(struct devlink *devlink, u32 id, + struct devlink_param_gset_ctx *ctx) +{ + struct rvu_devlink *rvu_dl = devlink_priv(devlink); + struct rvu *rvu = rvu_dl->rvu; + bool enabled; + + enabled = rvu_npc_exact_has_match_table(rvu); + + snprintf(ctx->val.vstr, sizeof(ctx->val.vstr), "%s", + enabled ? "enabled" : "disabled"); + + return 0; +} + +static int rvu_af_npc_exact_feature_disable(struct devlink *devlink, u32 id, + struct devlink_param_gset_ctx *ctx) +{ + struct rvu_devlink *rvu_dl = devlink_priv(devlink); + struct rvu *rvu = rvu_dl->rvu; + + rvu_npc_exact_disable_feature(rvu); + + return 0; +} + +static int rvu_af_npc_exact_feature_validate(struct devlink *devlink, u32 id, + union devlink_param_value val, + struct netlink_ext_ack *extack) +{ + struct rvu_devlink *rvu_dl = devlink_priv(devlink); + struct rvu *rvu = rvu_dl->rvu; + u64 enable; + + if (kstrtoull(val.vstr, 10, &enable)) { + NL_SET_ERR_MSG_MOD(extack, + "Only 1 value is supported"); + return -EINVAL; + } + + if (enable != 1) { + NL_SET_ERR_MSG_MOD(extack, + "Only disabling exact match feature is supported"); + return -EINVAL; + } + + if (rvu_npc_exact_can_disable_feature(rvu)) + return 0; + + NL_SET_ERR_MSG_MOD(extack, + "Can't disable exact match feature; Please try before any configuration"); + return -EFAULT; +} + static const struct devlink_param rvu_af_dl_params[] = { DEVLINK_PARAM_DRIVER(RVU_AF_DEVLINK_PARAM_ID_DWRR_MTU, "dwrr_mtu", DEVLINK_PARAM_TYPE_U32, BIT(DEVLINK_PARAM_CMODE_RUNTIME), rvu_af_dl_dwrr_mtu_get, rvu_af_dl_dwrr_mtu_set, rvu_af_dl_dwrr_mtu_validate), + DEVLINK_PARAM_DRIVER(RVU_AF_DEVLINK_PARAM_ID_NPC_EXACT_FEATURE_DISABLE, + "npc_exact_feature_disable", DEVLINK_PARAM_TYPE_STRING, + BIT(DEVLINK_PARAM_CMODE_RUNTIME), + rvu_af_npc_exact_feature_get, + rvu_af_npc_exact_feature_disable, + rvu_af_npc_exact_feature_validate), }; /* Devlink switch mode */ @@ -1501,6 +1563,7 @@ int rvu_register_dl(struct rvu *rvu) { struct rvu_devlink *rvu_dl; struct devlink *dl; + size_t size; int err; dl = devlink_alloc(&rvu_devlink_ops, sizeof(struct rvu_devlink), @@ -1522,8 +1585,12 @@ int rvu_register_dl(struct rvu *rvu) goto err_dl_health; } - err = devlink_params_register(dl, rvu_af_dl_params, - ARRAY_SIZE(rvu_af_dl_params)); + /* Register exact match devlink only for CN10K-B */ + size = ARRAY_SIZE(rvu_af_dl_params); + if (!rvu_npc_exact_has_match_table(rvu)) + size -= 1; + + err = devlink_params_register(dl, rvu_af_dl_params, size); if (err) { dev_err(rvu->dev, "devlink params register failed with error %d", err); diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c index d0158470a5c6..ef790a54743a 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c +++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c @@ -1142,6 +1142,34 @@ int rvu_npc_exact_update_table_entry(struct rvu *rvu, u8 cgx_id, u8 lmac_id, return 0; } +/** + * rvu_npc_exact_can_disable_feature - Check if feature can be disabled. + * @rvu: resource virtualization unit. + */ +bool rvu_npc_exact_can_disable_feature(struct rvu *rvu) +{ + struct npc_exact_table *table = rvu->hw->table; + bool empty; + + if (!rvu->hw->cap.npc_exact_match_enabled) + return false; + + mutex_lock(&table->lock); + empty = list_empty(&table->lhead_gbl); + mutex_unlock(&table->lock); + + return empty; +} + +/** + * rvu_npc_exact_disable_feature - Disable feature. + * @rvu: resource virtualization unit. + */ +void rvu_npc_exact_disable_feature(struct rvu *rvu) +{ + rvu->hw->cap.npc_exact_match_enabled = false; +} + /** * rvu_npc_exact_init - initialize exact match table * @rvu: resource virtualization unit. diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.h b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.h index f2346aa79ce2..7adb5c5c5082 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.h +++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.h @@ -185,4 +185,7 @@ int rvu_npc_exact_del_table_entry_by_id(struct rvu *rvu, u32 seq_id); u32 rvu_npc_exact_get_max_entries(struct rvu *rvu); int rvu_npc_exact_init(struct rvu *rvu); +bool rvu_npc_exact_can_disable_feature(struct rvu *rvu); +void rvu_npc_exact_disable_feature(struct rvu *rvu); + #endif /* RVU_NPC_HASH_H */ -- 2.25.1