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Message-ID: <13e21cef-7667-db8e-7a71-00d9f19eea56@linaro.org>
Date:   Wed, 6 Jul 2022 10:33:42 +0200
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Subject: Re: [PATCH 02/13] ARM: dts: qcom: add gsbi6 missing definition for
 ipq8064
Content-Language: en-US
To:     Christian Marangi <ansuelsmth@gmail.com>,
        Andy Gross <agross@kernel.org>,
        Bjorn Andersson <bjorn.andersson@linaro.org>,
        Konrad Dybcio <konrad.dybcio@somainline.org>,
        Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
        linux-kernel@vger.kernel.org
Cc:     Jonathan McDowell <noodles@earth.li>
References: <20220705133917.8405-1-ansuelsmth@gmail.com>
 <20220705133917.8405-3-ansuelsmth@gmail.com>
From:   Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
In-Reply-To: <20220705133917.8405-3-ansuelsmth@gmail.com>
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On 05/07/2022 15:39, Christian Marangi wrote:
> Add gsbi6 missing definition for ipq8064.
> 
> Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
> Tested-by: Jonathan McDowell <noodles@earth.li>
> ---
>  arch/arm/boot/dts/qcom-ipq8064.dtsi | 40 +++++++++++++++++++++++++++++
>  1 file changed, 40 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi
> index f06a17bd915a..1b4b72723ead 100644
> --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
> +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
> @@ -665,6 +665,46 @@ spi@1a280000 {
>  			};
>  		};
>  
> +		gsbi6: gsbi@16500000 {
> +			status = "disabled";

status goes to the end of properties.

> +			compatible = "qcom,gsbi-v1.0.0";

Compatible is first.

> +			cell-index = <6>;
> +			reg = <0x16500000 0x100>;

reg is second.

> +			clocks = <&gcc GSBI6_H_CLK>;
> +			clock-names = "iface";
> +			#address-cells = <1>;
> +			#size-cells = <1>;
> +			ranges;
> +
> +			syscon-tcsr = <&tcsr>;
> +
> +			gsbi6_i2c: i2c@16580000 {
> +				compatible = "qcom,i2c-qup-v1.1.1";
> +				reg = <0x16580000 0x1000>;
> +				interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
> +
> +				clocks = <&gcc GSBI6_QUP_CLK>, <&gcc GSBI6_H_CLK>;
> +				clock-names = "core", "iface";
> +				status = "disabled";

Ditto.

> +
> +				#address-cells = <1>;
> +				#size-cells = <0>;
> +			};
> +
> +			gsbi6_spi: spi@16580000 {
> +				compatible = "qcom,spi-qup-v1.1.1";
> +				reg = <0x16580000 0x1000>;
> +				interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
> +
> +				clocks = <&gcc GSBI6_QUP_CLK>, <&gcc GSBI6_H_CLK>;
> +				clock-names = "core", "iface";
> +				status = "disabled";

Ditto

> +
> +				#address-cells = <1>;
> +				#size-cells = <0>;
> +			};
> +		};
> +
>  		gsbi7: gsbi@16600000 {
>  			status = "disabled";
>  			compatible = "qcom,gsbi-v1.0.0";


Best regards,
Krzysztof