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[2620:137:e000::1:20]) by mx.google.com with ESMTP id p4-20020a62d004000000b0051c2ac96debsi44686302pfg.288.2022.07.06.05.00.27; Wed, 06 Jul 2022 05:00:40 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=gE2DOnke; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232769AbiGFLoC (ORCPT + 99 others); Wed, 6 Jul 2022 07:44:02 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43356 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231689AbiGFLoA (ORCPT ); Wed, 6 Jul 2022 07:44:00 -0400 Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AD99621A for ; Wed, 6 Jul 2022 04:43:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1657107839; x=1688643839; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=2BQGwJvaGkI3ta8Axwf5AjPJuv0kEeRPs9Fx1GKNBxk=; b=gE2DOnkesE6GikjeCQ4IxatERdruytdBZf1KmvYcZ8F9DKk8rr/uqEpk 23vLzRbc4sVSqOoDq926GFpL9w+F9iCsWMQUaZ3Xqo7bLKOlshrlHzEf6 V29mEErJN9XmVTfG/XSYrTNAHgHo65vnokbY12f3zGIRu1xRCBEWyBCkY CHIGRbS0KejBrwXixXJe5MQjl2yD/3PQauibO7DQx7x7C0cL2wUQIkFkG FrSCrmyw/f/hX7dTCHBrbqvnniOLi82q5UjJfCPqpyljlCEoM3PhJ3MgZ HiTvpb360VXjMRJD6t6rWNjPPEqm0Ng1E5L5Ny5Q1AI4JAHZDgLvjVFRa g==; X-IronPort-AV: E=McAfee;i="6400,9594,10399"; a="347707427" X-IronPort-AV: E=Sophos;i="5.92,249,1650956400"; d="scan'208";a="347707427" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Jul 2022 04:43:59 -0700 X-IronPort-AV: E=Sophos;i="5.92,249,1650956400"; d="scan'208";a="650630076" Received: from sannilnx.jer.intel.com ([10.12.26.175]) by fmsmga008-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Jul 2022 04:43:56 -0700 From: Alexander Usyskin To: Greg Kroah-Hartman , Jani Nikula , Joonas Lahtinen , Rodrigo Vivi , David Airlie , Daniel Vetter , Tvrtko Ursulin Cc: Tomas Winkler , Alexander Usyskin , Vitaly Lubart , intel-gfx@lists.freedesktop.org, linux-kernel@vger.kernel.org Subject: [PATCH v5 00/14] GSC support for XeHP SDV and DG2 platforms Date: Wed, 6 Jul 2022 14:43:31 +0300 Message-Id: <20220706114345.1128018-1-alexander.usyskin@intel.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-5.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add GSC support for XeHP SDV and DG2 platforms. The series includes changes for the mei driver: - add ability to use polling instead of interrupts - add ability to use extended timeouts - setup extended operational memory for GSC The series includes changes for the i915 driver: - allocate extended operational memory for GSC - GSC on XeHP SDV offsets and definitions Greg KH, please review and ACK the MEI patches. We are pushing these patches through gfx tree as the auxiliary device belongs there. V2: rebase over merged DG1 series and DG2 enablement patch, fix commit messages V3: rebase over latest tip V4: add missed changelog in pxp dbugfs patch V5: rebase over latest tip fix changelog in pxp dbugfs patch put HAX patch last to the ease of merging Alexander Usyskin (5): drm/i915/gsc: add slow_fw flag to the mei auxiliary device drm/i915/gsc: add slow_fw flag to the gsc device definition drm/i915/gsc: add GSC XeHP SDV platform definition mei: gsc: wait for reset thread on stop mei: extend timeouts on slow devices. Daniele Ceraolo Spurio (1): HAX: drm/i915: force INTEL_MEI_GSC on for CI Tomas Winkler (5): mei: gsc: use polling instead of interrupts mei: mkhi: add memory ready command mei: gsc: setup gsc extended operational memory mei: debugfs: add pxp mode to devstate in debugfs drm/i915/gsc: allocate extended operational memory in LMEM Vitaly Lubart (3): drm/i915/gsc: skip irq initialization if using polling mei: bus: export common mkhi definitions into a separate header mei: gsc: add transition to PXP mode in resume flow drivers/gpu/drm/i915/Kconfig.debug | 1 + drivers/gpu/drm/i915/gt/intel_gsc.c | 119 +++++++++++++++++++++++++--- drivers/gpu/drm/i915/gt/intel_gsc.h | 3 + drivers/misc/mei/bus-fixup.c | 105 ++++++++++++++++-------- drivers/misc/mei/client.c | 14 ++-- drivers/misc/mei/debugfs.c | 17 ++++ drivers/misc/mei/gsc-me.c | 77 +++++++++++++++--- drivers/misc/mei/hbm.c | 12 +-- drivers/misc/mei/hw-me-regs.h | 7 ++ drivers/misc/mei/hw-me.c | 116 ++++++++++++++++++++++----- drivers/misc/mei/hw-me.h | 14 +++- drivers/misc/mei/hw-txe.c | 2 +- drivers/misc/mei/hw.h | 5 ++ drivers/misc/mei/init.c | 21 ++++- drivers/misc/mei/main.c | 2 +- drivers/misc/mei/mei_dev.h | 26 ++++++ drivers/misc/mei/mkhi.h | 57 +++++++++++++ drivers/misc/mei/pci-me.c | 2 +- include/linux/mei_aux.h | 2 + 19 files changed, 511 insertions(+), 91 deletions(-) create mode 100644 drivers/misc/mei/mkhi.h -- 2.34.1