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[93.42.70.190]) by smtp.gmail.com with ESMTPSA id s3-20020a056402520300b0043a84dfbf06sm2124739edd.15.2022.07.06.06.19.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 Jul 2022 06:19:46 -0700 (PDT) Message-ID: <62c58bf2.1c69fb81.f5075.3309@mx.google.com> X-Google-Original-Message-ID: Date: Wed, 6 Jul 2022 15:03:10 +0200 From: Christian Marangi To: Konrad Dybcio Cc: Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Jonathan McDowell Subject: Re: [PATCH 09/13] ARM: dts: qcom: add smem node for ipq8064 References: <20220705133917.8405-1-ansuelsmth@gmail.com> <20220705133917.8405-10-ansuelsmth@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM, RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Jul 06, 2022 at 03:11:05PM +0200, Konrad Dybcio wrote: > > > On 5.07.2022 15:39, Christian Marangi wrote: > > Add missing smem node for ipq8064. > > > > Signed-off-by: Christian Marangi > > Tested-by: Jonathan McDowell > > --- > I can't find a downstream kernel for these router SoCs, but > I wonder if the 8x64 family DTs couldn't be somewhat > unified? It looks like they share quite some code.. Mhh don't know they have some peculiar changes so unifying them would make more harm than good IMHO. > > Konrad > > arch/arm/boot/dts/qcom-ipq8064.dtsi | 18 ++++++++++++++++++ > > 1 file changed, 18 insertions(+) > > > > diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi > > index b5aede3d7ccf..98527a7d885e 100644 > > --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi > > +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi > > @@ -908,6 +908,11 @@ lcc: clock-controller@28000000 { > > #reset-cells = <1>; > > }; > > > > + sfpb_mutex_block: syscon@1200600 { > > + compatible = "syscon"; > > + reg = <0x01200600 0x100>; > > + }; > > + > > pcie0: pci@1b500000 { > > compatible = "qcom,pcie-ipq8064"; > > reg = <0x1b500000 0x1000 > > @@ -1332,4 +1337,17 @@ sdcc3: mmc@12180000 { > > }; > > }; > > }; > > + > > + sfpb_mutex: sfpb-mutex { > > + compatible = "qcom,sfpb-mutex"; > > + syscon = <&sfpb_mutex_block 4 4>; > > + > > + #hwlock-cells = <1>; > > + }; > > + > > + smem { > > + compatible = "qcom,smem"; > > + memory-region = <&smem>; > > + hwlocks = <&sfpb_mutex 3>; > > + }; > > }; -- Ansuel