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Received: from MN2PR12MB4192.namprd12.prod.outlook.com (2603:10b6:208:1d5::15) by MN0PR12MB6296.namprd12.prod.outlook.com (2603:10b6:208:3d3::9) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5395.20; Wed, 6 Jul 2022 17:55:20 +0000 Received: from MN2PR12MB4192.namprd12.prod.outlook.com ([fe80::ac35:7c4b:3282:abfb]) by MN2PR12MB4192.namprd12.prod.outlook.com ([fe80::ac35:7c4b:3282:abfb%3]) with mapi id 15.20.5395.021; Wed, 6 Jul 2022 17:55:20 +0000 Date: Wed, 6 Jul 2022 14:55:19 -0300 From: Jason Gunthorpe To: Nicolin Chen Cc: kwankhede@nvidia.com, corbet@lwn.net, hca@linux.ibm.com, gor@linux.ibm.com, agordeev@linux.ibm.com, borntraeger@linux.ibm.com, svens@linux.ibm.com, zhenyuw@linux.intel.com, zhi.a.wang@intel.com, jani.nikula@linux.intel.com, joonas.lahtinen@linux.intel.com, rodrigo.vivi@intel.com, tvrtko.ursulin@linux.intel.com, airlied@linux.ie, daniel@ffwll.ch, farman@linux.ibm.com, mjrosato@linux.ibm.com, pasic@linux.ibm.com, vneethv@linux.ibm.com, oberpar@linux.ibm.com, freude@linux.ibm.com, akrowiak@linux.ibm.com, jjherne@linux.ibm.com, alex.williamson@redhat.com, cohuck@redhat.com, kevin.tian@intel.com, hch@infradead.org, jchrist@linux.ibm.com, kvm@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-s390@vger.kernel.org, intel-gvt-dev@lists.freedesktop.org, intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Subject: Re: [RFT][PATCH v2 5/9] vfio/ap: Remove redundant pfn Message-ID: <20220706175519.GM693670@nvidia.com> References: <20220706062759.24946-1-nicolinc@nvidia.com> <20220706062759.24946-6-nicolinc@nvidia.com> Content-Type: text/plain; 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I would describe this as renaming saved_pfn to saved_iova > * > * @vcpu: the object representing the vcpu executing the PQAP(AQIC) instruction. > * @nib: the location for storing the nib address. > - * @g_pfn: the location for storing the page frame number of the page containing > - * the nib. > * > * When the PQAP(AQIC) instruction is executed, general register 2 contains the > * address of the notification indicator byte (nib) used for IRQ notification. > - * This function parses the nib from gr2 and calculates the page frame > - * number for the guest of the page containing the nib. The values are > - * stored in @nib and @g_pfn respectively. > - * > - * The g_pfn of the nib is then validated to ensure the nib address is valid. > + * This function parses and validate the nib from gr2. > * > * Return: returns zero if the nib address is a valid; otherwise, returns > * -EINVAL. > */ > -static int vfio_ap_validate_nib(struct kvm_vcpu *vcpu, unsigned long *nib, > - unsigned long *g_pfn) > +static int vfio_ap_validate_nib(struct kvm_vcpu *vcpu, dma_addr_t *nib) > { > *nib = vcpu->run->s.regs.gprs[2]; > - *g_pfn = *nib >> PAGE_SHIFT; > > - if (kvm_is_error_hva(gfn_to_hva(vcpu->kvm, *g_pfn))) > + if (kvm_is_error_hva(gfn_to_hva(vcpu->kvm, *nib >> PAGE_SHIFT))) > return -EINVAL; This existing code is fishy. nib is either an IOVA passed to vfio_pin_pages() or a GFN passed to gfn_to_hva(). These are not the same thing and are not interchangable - writing code like this assumes that the guest is running with iommu=pt or no iommu. Someone should look at it.. Otherwise it looks OK Reviewed-by: Jason Gunthorpe Jason