Received: by 2002:ad5:4acb:0:0:0:0:0 with SMTP id n11csp3035880imw; Wed, 6 Jul 2022 16:23:33 -0700 (PDT) X-Google-Smtp-Source: AGRyM1sl1v7pi7zZqev/7ROqWloqiXkJt8jCPNFdYlnqq2GxV3+QFn9MQ++8Oa72hBjSInE1pNRc X-Received: by 2002:a05:6402:5299:b0:435:61da:9bb9 with SMTP id en25-20020a056402529900b0043561da9bb9mr58350041edb.21.1657149813530; Wed, 06 Jul 2022 16:23:33 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1657149813; cv=none; d=google.com; s=arc-20160816; b=uwm74wlnNXxylJK0+g3U+4HlKNPnfXdAUC244FamCj6OOniH8aR8tGWlaJgKvsezDR hyUTYqr6flW/S/Fiwqd5uQo1Po0RwSqnmhBy6w3xz9WKwPU9af0b3WO2Wo4VAfCSugvN 4YlRlVBvlv7lFShhydw+LW1VVF+niJeLcr6DL8KDTfAtQD1GCVHlYmK0fTIQDddPUCqQ ck2f7hVDhrVzL3AshuhVwKmRn+6MkwaDl2w6K/kPQpP8hqKbRTIPw3rVdo5ziD4cX7aV 80iDjYRMN1UwVHy1cbQG2H/d8UvQ+JpvtK6sFHpSaSnOlF6e2Ki3I5E84vgbo7HgNoWD LZLw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:in-reply-to:content-disposition:mime-version :references:message-id:subject:to:from:date; bh=rpwT695sri6PiwsIkplM0soIt4K0mTDGGLf39HX2spg=; b=LjGDBHTEoip14ymn47VEN47JrtH1aZ9dtN7gct4SJd/qz7YvimV+sl5GjIrOLKf4/X FMqJKu5AyniQjdlbbl7E1GEnlWcRikAmeX2teN/cgTZMuMD38JVRv0pAHpxcxFD7WB0K GDbZpZlQAMltZPOPe6GGATBRzCVWqhYxZk2n4b9SYCV64TfD+Q6ED5ng8VCK4sLdT8ZG wW0VBPxE8/f+lqzrnCZqMvNQbxkwWs5T55VZKA8Fldl5f72ceHZqJ69ffcUUvBqXXRry BhEiFywYYjCkArPgB+EEw6Hk66oO3oJuQAQfMi0lVS6O6Mra/TqfnjuD2RLgWqRZ6C2H gRmQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id n18-20020aa7d052000000b0043a72951a14si8449574edo.304.2022.07.06.16.23.07; Wed, 06 Jul 2022 16:23:33 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234054AbiGFXB1 (ORCPT + 99 others); Wed, 6 Jul 2022 19:01:27 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51606 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229768AbiGFXBX (ORCPT ); Wed, 6 Jul 2022 19:01:23 -0400 Received: from mail-ot1-f41.google.com (mail-ot1-f41.google.com [209.85.210.41]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9E71A1C12F; Wed, 6 Jul 2022 16:01:22 -0700 (PDT) Received: by mail-ot1-f41.google.com with SMTP id 7-20020a9d0107000000b00616935dd045so12840683otu.6; Wed, 06 Jul 2022 16:01:22 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:from:to:subject:message-id:references :mime-version:content-disposition:in-reply-to; bh=rpwT695sri6PiwsIkplM0soIt4K0mTDGGLf39HX2spg=; b=lNyqBye5TUrmVc25uQEzrqVcglIdDbtya0SJHAolFQI3/jGaesHEKvaJU9ThVZSws9 X+/nK8t7WVLGo3k/C6bciAPwi42GjAQC/tlGkVdRRJgQ0IF9JCuICL6tQ4IQ13iNxyrB rvRg7MtsUnd1S+ny0eIMuZ75ijtki01vBMjwNqUEek7Mgz2cppWO8FlUV4Qa3nyPuAmq 2/uqxxe7Xyrs5UMkpTdjBeymYkWvT5D7J/D7LkJ8qa2W7CU2SJQeXlaiwwReZGNwIJbb lgTzZeBCdwXPnkOnlvceJeVhlBPIZNNOjfN4cyXRU2cUpu3zS88TYSKmnsuHA6O9J6x7 Ja0w== X-Gm-Message-State: AJIora8mrLvPkis6jkcktVnYP2oY0Me7f8IqSqCPv9DcMJbYikMe0Lmp FAnhmqerNZVsFGAo9pu7EA0fUnAklQ== X-Received: by 2002:a9d:7646:0:b0:616:c17c:7d26 with SMTP id o6-20020a9d7646000000b00616c17c7d26mr19384810otl.83.1657148481842; Wed, 06 Jul 2022 16:01:21 -0700 (PDT) Received: from robh.at.kernel.org ([2607:fb90:5fe0:199f:283a:d3be:fc5c:70cd]) by smtp.gmail.com with ESMTPSA id v39-20020a05687070a700b0010c3b371098sm25324oae.27.2022.07.06.16.01.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 Jul 2022 16:01:21 -0700 (PDT) Received: (nullmailer pid 673503 invoked by uid 1000); Wed, 06 Jul 2022 22:46:13 -0000 Date: Wed, 6 Jul 2022 16:46:13 -0600 From: Rob Herring To: Wolfram Sang , Alain Volmat , mark.rutland@arm.com, pierre-yves.mordret@foss.st.com, mcoquelin.stm32@gmail.com, alexandre.torgue@foss.st.com, linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, fabrice.gasnier@foss.st.com, amelie.delaunay@foss.st.com Subject: Re: [PATCH 1/4] dt-bindings: i2c: st,stm32-i2c: don't mandate a reset line Message-ID: <20220706224613.GD572635-robh@kernel.org> References: <20220620105405.145959-1-alain.volmat@foss.st.com> <20220620105405.145959-2-alain.volmat@foss.st.com> <20220628134115.GA345270-robh@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-Spam-Status: No, score=-1.2 required=5.0 tests=BAYES_00, FREEMAIL_ENVFROM_END_DIGIT,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Jun 29, 2022 at 09:44:37PM +0200, Wolfram Sang wrote: > On Tue, Jun 28, 2022 at 07:41:15AM -0600, Rob Herring wrote: > > On Mon, Jun 20, 2022 at 12:54:02PM +0200, Alain Volmat wrote: > > > Update the dt-bindings of the i2c-stm32 drivers to avoid the > > > needs for a reset property in the device-tree. > > > > That is clear from the diff, but why. Some chips don't have a reset? > > If so, this should be combined with patch 2 as part of changes needed > > for a new version. > > What do you mean? Patches 1+2 should be squashed together? I can do this > when applying. Or do you mean something else? Sorry, I meant combined with patch 3. If the new chip added in patch 3 doesn't have a reset, then 1 and 3 should be 1 patch. IOW, all the changes needed for a new chip in 1 patch. Rob