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From:   Besar Wicaksono <bwicaksono@nvidia.com>
To:     Will Deacon <will@kernel.org>
CC:     "suzuki.poulose@arm.com" <suzuki.poulose@arm.com>,
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Subject: RE: [RESEND PATCH v3 1/2] perf: coresight_pmu: Add support for ARM
 CoreSight PMU driver
Thread-Topic: [RESEND PATCH v3 1/2] perf: coresight_pmu: Add support for ARM
 CoreSight PMU driver
Thread-Index: AQHYhTLreZhiUX+onkijjgrrTcbLR61jGS4AgA8LzXA=
Date:   Thu, 7 Jul 2022 00:25:45 +0000
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References: <20220621055035.31766-1-bwicaksono@nvidia.com>
 <20220621055035.31766-2-bwicaksono@nvidia.com>
 <20220627103642.GB22095@willie-the-truck>
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> -----Original Message-----
> From: Will Deacon <will@kernel.org>
> Sent: Monday, June 27, 2022 5:37 PM
> To: Besar Wicaksono <bwicaksono@nvidia.com>
> Cc: suzuki.poulose@arm.com; robin.murphy@arm.com;
> catalin.marinas@arm.com; mark.rutland@arm.com; linux-arm-
> kernel@lists.infradead.org; linux-kernel@vger.kernel.org; linux-
> tegra@vger.kernel.org; sudeep.holla@arm.com;
> thanu.rangarajan@arm.com; Michael.Williams@arm.com; Thierry Reding
> <treding@nvidia.com>; Jonathan Hunter <jonathanh@nvidia.com>; Vikram
> Sethi <vsethi@nvidia.com>; mathieu.poirier@linaro.org;
> mike.leach@linaro.org; leo.yan@linaro.org
> Subject: Re: [RESEND PATCH v3 1/2] perf: coresight_pmu: Add support for
> ARM CoreSight PMU driver
>=20
> External email: Use caution opening links or attachments
>=20
>=20
> On Tue, Jun 21, 2022 at 12:50:34AM -0500, Besar Wicaksono wrote:
> > Add support for ARM CoreSight PMU driver framework and interfaces.
> > The driver provides generic implementation to operate uncore PMU based
> > on ARM CoreSight PMU architecture. The driver also provides interface
> > to get vendor/implementation specific information, for example event
> > attributes and formating.
> >
> > The specification used in this implementation can be found below:
> >  * ACPI Arm Performance Monitoring Unit table:
> >         https://developer.arm.com/documentation/den0117/latest
> >  * ARM Coresight PMU architecture:
> >         https://developer.arm.com/documentation/ihi0091/latest
> >
> > Signed-off-by: Besar Wicaksono <bwicaksono@nvidia.com>
> > ---
> >  arch/arm64/configs/defconfig                  |    1 +
> >  drivers/perf/Kconfig                          |    2 +
> >  drivers/perf/Makefile                         |    1 +
> >  drivers/perf/coresight_pmu/Kconfig            |   11 +
> >  drivers/perf/coresight_pmu/Makefile           |    6 +
> >  .../perf/coresight_pmu/arm_coresight_pmu.c    | 1312
> +++++++++++++++++
> >  .../perf/coresight_pmu/arm_coresight_pmu.h    |  177 +++
> >  7 files changed, 1510 insertions(+)
> >  create mode 100644 drivers/perf/coresight_pmu/Kconfig
> >  create mode 100644 drivers/perf/coresight_pmu/Makefile
> >  create mode 100644 drivers/perf/coresight_pmu/arm_coresight_pmu.c
> >  create mode 100644 drivers/perf/coresight_pmu/arm_coresight_pmu.h
> >
> > diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfi=
g
> > index 7d1105343bc2..22184f8883da 100644
> > --- a/arch/arm64/configs/defconfig
> > +++ b/arch/arm64/configs/defconfig
> > @@ -1212,6 +1212,7 @@ CONFIG_PHY_UNIPHIER_USB3=3Dy
> >  CONFIG_PHY_TEGRA_XUSB=3Dy
> >  CONFIG_PHY_AM654_SERDES=3Dm
> >  CONFIG_PHY_J721E_WIZ=3Dm
> > +CONFIG_ARM_CORESIGHT_PMU=3Dy
> >  CONFIG_ARM_SMMU_V3_PMU=3Dm
> >  CONFIG_FSL_IMX8_DDR_PMU=3Dm
> >  CONFIG_QCOM_L2_PMU=3Dy
> > diff --git a/drivers/perf/Kconfig b/drivers/perf/Kconfig
> > index 1e2d69453771..c4e7cd5b4162 100644
> > --- a/drivers/perf/Kconfig
> > +++ b/drivers/perf/Kconfig
> > @@ -192,4 +192,6 @@ config MARVELL_CN10K_DDR_PMU
> >         Enable perf support for Marvell DDR Performance monitoring
> >         event on CN10K platform.
> >
> > +source "drivers/perf/coresight_pmu/Kconfig"
> > +
> >  endmenu
> > diff --git a/drivers/perf/Makefile b/drivers/perf/Makefile
> > index 57a279c61df5..4126a04b5583 100644
> > --- a/drivers/perf/Makefile
> > +++ b/drivers/perf/Makefile
> > @@ -20,3 +20,4 @@ obj-$(CONFIG_ARM_DMC620_PMU) +=3D
> arm_dmc620_pmu.o
> >  obj-$(CONFIG_MARVELL_CN10K_TAD_PMU) +=3D
> marvell_cn10k_tad_pmu.o
> >  obj-$(CONFIG_MARVELL_CN10K_DDR_PMU) +=3D
> marvell_cn10k_ddr_pmu.o
> >  obj-$(CONFIG_APPLE_M1_CPU_PMU) +=3D apple_m1_cpu_pmu.o
> > +obj-$(CONFIG_ARM_CORESIGHT_PMU) +=3D coresight_pmu/
> > diff --git a/drivers/perf/coresight_pmu/Kconfig
> b/drivers/perf/coresight_pmu/Kconfig
> > new file mode 100644
> > index 000000000000..89174f54c7be
> > --- /dev/null
> > +++ b/drivers/perf/coresight_pmu/Kconfig
> > @@ -0,0 +1,11 @@
> > +# SPDX-License-Identifier: GPL-2.0
> > +#
> > +# Copyright (c) 2022, NVIDIA CORPORATION & AFFILIATES.
> > +
> > +config ARM_CORESIGHT_PMU
> > +     tristate "ARM Coresight PMU"
> > +     depends on ACPI
> > +     depends on ACPI_APMT || COMPILE_TEST
>=20
> ACPI_APMT doesn't exist in my tree. What's missing here?
>=20
> Will

It is missing the APMT support patch in: https://lkml.org/lkml/2022/4/19/13=
95
I will add this reference to the driver patch cover letter.

Regards.
Besar