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Message-ID: <bd889cd7b72138a12b1339a33156ff46530c20b0.camel@xry111.site>
Subject: Re: [PATCH v2] LoongArch: Clean useless vcsr in loongarch_fpu.
From:   Xi Ruoyao <xry111@xry111.site>
To:     WANG Xuerui <kernel@xen0n.name>, Qi Hu <huqi@loongson.cn>,
        Jiaxun Yang <jiaxun.yang@flygoat.com>,
        Huacai Chen <chenhuacai@kernel.org>
Cc:     loongarch@lists.linux.dev, LKML <linux-kernel@vger.kernel.org>
Date:   Thu, 07 Jul 2022 12:04:28 +0800
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On Thu, 2022-07-07 at 11:05 +0800, WANG Xuerui wrote:

> To be frank, at this point I think you're trying to hide something.=20
> (This is not your fault, blame someone else of course because they told=
=20
> you the fact.) In the old-world kernel the VCSR a.k.a. FCSR16 is=20
> certainly being saved/restored, and there's apparently no harm in doing=
=20
> so. And if the contents are indeed "undefined", why are the code there
> in the first place? Certainly the bits *are* meaningful, only that for
> some reason you aren't revealing the semantics and pretending that they=
=20
> are "undefined" and probably "do nothing externally observable" if=20
> accessed in the first place.

On a 3A5000LL, I did an experiment via a kernel module, which enables
LSX/LASX and tries to write and read fcsr16.  I tried each bit (1, 2, 4,
8, ..., 1 << 31) one by one.  The result: no matter which bit I wrote
into fcsr16, I always read out 0.

And I've objdump'ed a kernel shipped in an early Loongnix release.  It
seems the only reference to fcsr16 is a "movgr2fcsr $r16, $r0"
instruction.
--=20
Xi Ruoyao <xry111@xry111.site>
School of Aerospace Science and Technology, Xidian University