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Fri, 8 Jul 2022 08:17:30 +0000 (GMT) Received: from sig-9-145-21-70.uk.ibm.com (unknown [9.145.21.70]) by b06wcsmtp001.portsmouth.uk.ibm.com (Postfix) with ESMTP; Fri, 8 Jul 2022 08:17:30 +0000 (GMT) Message-ID: <44c823d7c9ab15579d30734761200c0a6ed44a6f.camel@linux.ibm.com> Subject: Re: [PATCH v3 00/15] iommu: Retire bus_set_iommu() From: Niklas Schnelle To: Robin Murphy , joro@8bytes.org, Matthew Rosato Cc: will@kernel.org, iommu@lists.linux.dev, linux-arm-kernel@lists.infradead.org, baolu.lu@linux.intel.com, suravee.suthikulpanit@amd.com, vasant.hegde@amd.com, mjrosato@linux.ibm.com, gerald.schaefer@linux.ibm.com, linux-s390@vger.kernel.org, linux-kernel@vger.kernel.org Date: Fri, 08 Jul 2022 10:17:30 +0200 In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.28.5 (3.28.5-18.el8) X-TM-AS-GCONF: 00 X-Proofpoint-GUID: MWVqaxMEq8CD8_OlP2DoJ9y5jxZ7Sui9 X-Proofpoint-ORIG-GUID: MWVqaxMEq8CD8_OlP2DoJ9y5jxZ7Sui9 Content-Transfer-Encoding: 7bit X-Proofpoint-UnRewURL: 0 URL was un-rewritten MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.883,Hydra:6.0.517,FMLib:17.11.122.1 definitions=2022-07-08_06,2022-06-28_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 spamscore=0 adultscore=0 priorityscore=1501 malwarescore=0 lowpriorityscore=0 bulkscore=0 mlxlogscore=780 clxscore=1015 suspectscore=0 impostorscore=0 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2206140000 definitions=main-2207080030 X-Spam-Status: No, score=-2.0 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_EF,RCVD_IN_MSPIKE_H2,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, 2022-07-05 at 18:08 +0100, Robin Murphy wrote: > v2: https://lore.kernel.org/linux-iommu/cover.1650890638.git.robin.murphy@arm.com/ > > Hi all, > > Here's v3, now with working x86! Having finally made sense of how I > broke Intel, I've given AMD the same fix by inspection. I'm still not > 100% sure about s390, but it looks like it should probably be OK since > it seems to register an IOMMU instance for each PCI device (?!) before > disappearing into PCI hotplug code, wherein I assume we should never see > a PCI device appear without its IOMMU already registered. Yes, this is a bit unusual as our PCI architecture doesn't really have a notion of an IOMMU device only of I/O translation tables. These are then registered per PCI function. PCI functions may share I/O translation tables and thus DMA address spaces but this is not done at the moment. As Matt already mentioned we do need a small change for this patch series. Since that was still mangled in his mail for me I just replied with that using "git send-email". With Matt's patch applied I can confirm that this works fine for us and does look like a useful simplification. So feel free to add my Tested-by: Niklas Schnelle