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[2620:137:e000::1:20]) by mx.google.com with ESMTP id k22-20020a056a00169600b0051873a68dd2si11838280pfc.252.2022.07.11.04.39.49; Mon, 11 Jul 2022 04:40:00 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229951AbiGKK6g (ORCPT + 99 others); Mon, 11 Jul 2022 06:58:36 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43344 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229676AbiGKK6J (ORCPT ); Mon, 11 Jul 2022 06:58:09 -0400 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 20C601020A1 for ; Mon, 11 Jul 2022 03:03:19 -0700 (PDT) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 88C871682; Mon, 11 Jul 2022 03:03:19 -0700 (PDT) Received: from bogus (unknown [10.57.39.193]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id D63B23F73D; Mon, 11 Jul 2022 03:03:14 -0700 (PDT) Date: Mon, 11 Jul 2022 11:02:04 +0100 From: Sudeep Holla To: Conor.Dooley@microchip.com Cc: paul.walmsley@sifive.com, palmer@dabbelt.com, palmer@rivosinc.com, aou@eecs.berkeley.edu, catalin.marinas@arm.com, will@kernel.org, gregkh@linuxfoundation.org, rafael@kernel.org, linux@armlinux.org.uk, arnd@arndb.de, Daire.McNamara@microchip.com, niklas.cassel@wdc.com, damien.lemoal@opensource.wdc.com, geert@linux-m68k.org, zong.li@sifive.com, kernel@esmil.dk, hahnjo@hahnjo.de, guoren@kernel.org, anup@brainfault.org, atishp@atishpatra.org, heiko@sntech.de, philipp.tomsich@vrull.eu, robh@kernel.org, maz@kernel.org, viresh.kumar@linaro.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Brice.Goglin@inria.fr Subject: Re: [PATCH v2 1/2] arm64: topology: move store_cpu_topology() to shared code Message-ID: <20220711100204.bj3r3g6xs577kuul@bogus> References: <20220708203342.256459-1-mail@conchuod.ie> <20220708203342.256459-2-mail@conchuod.ie> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_NONE,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sat, Jul 09, 2022 at 12:58:57PM +0000, Conor.Dooley@microchip.com wrote: > Looking at the arm32 implementation - it appears to be mostly the sort of MPIDR > stuff that was removed from the arm64 implementation in 3102bc0e6ac7 ("arm64: > topology: Stop using MPIDR for topology information"). Could arm32 benefit from > the same shared implemenation too, or is usage of MPIDR only invalid for arm64? I don't recall all the details but IIRC there are parts if arch_topology that are ARM64/RISC-V only. ARM32 doesn't use it as it may break old platforms. Some of the functions that still arm32 specific are retained in arch/arm > The other difference is a call to update_cpu_capacity() in the arm32 > implementation. Could that be moved to smp_store_cpu_info() which is the only > callsite of store_cpu_topology()? > No please, leave arm32 as is. It was done for a reason like that and it help to not break some of the old 32-by platforms. > Either way, will respin a v3 that doesn't break the arm32 build when > CONFIG_GENERIC_ARCH_TOPOLOGY is enabled :) > Thanks. -- Regards, Sudeep