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Each mailbox is accessed > > through a DOE Extended Capability. > > > > Each DOE mailbox must support the DOE discovery protocol in addition to > > any number of additional protocols. > > > > Define core PCIe functionality to manage a single PCIe DOE mailbox at a > > defined config space offset. Functionality includes iterating, > > creating, query of supported protocol, and task submission. Destruction > > of the mailboxes is device managed. > > > > Cc: "Li, Ming" > > Cc: Bjorn Helgaas > > Signed-off-by: Jonathan Cameron > > Co-developed-by: Ira Weiny > > Signed-off-by: Ira Weiny > > Whenever the CXL folks are happy with this: > > Acked-by: Bjorn Helgaas > > > +static int pci_doe_recv_resp(struct pci_doe_mb *doe_mb, struct pci_doe_task *task) > > ... > > + pci_err(pdev, > > + "[%x] expected [VID, Protocol] = [%04x, %02x], got [%04x, %02x]\n", > > Since the string already wraps, I think there's no benefit to starting > it on its own line. Joining with "pci_err(pdev, "[%x] ..." improves > greppability slightly. > > > + pci_err(pdev, > > + "[%x] busy detected; another entity is sending conflicting requests\n", > > + offset); > > Ditto. > > > + * pci_doe_submit_task() - Submit a task to be processed by the state machine > > ... > > + * RETURNS: 0 when task has been successful queued, -ERRNO on error > > successfully > > > +int pci_doe_submit_task(struct pci_doe_mb *doe_mb, struct pci_doe_task *task) > > ... > > + * DOE requests must be a whole number of DW > > + * and the response needs to be big enough for at least 1 DW > > Rewrap to fill 78 columns or so. Thanks, I've fixed these up and will submit a 13.1 soon with Willy's change to xa_mk_value() which he caught from the other thread. Thanks again for all the review, Ira