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[209.85.221.46]) by smtp.gmail.com with ESMTPSA id s10-20020a1709064d8a00b0072b33e91f96sm3130082eju.190.2022.07.11.16.22.37 for (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 11 Jul 2022 16:22:37 -0700 (PDT) Received: by mail-wr1-f46.google.com with SMTP id z12so8899371wrq.7 for ; Mon, 11 Jul 2022 16:22:37 -0700 (PDT) X-Received: by 2002:adf:d1e9:0:b0:21b:c8f8:3c16 with SMTP id g9-20020adfd1e9000000b0021bc8f83c16mr18888013wrd.659.1657581756957; Mon, 11 Jul 2022 16:22:36 -0700 (PDT) MIME-Version: 1.0 References: <1657346375-1461-1-git-send-email-quic_akhilpo@quicinc.com> <20220709112837.v2.3.I4ac27a0b34ea796ce0f938bb509e257516bc6f57@changeid> In-Reply-To: <20220709112837.v2.3.I4ac27a0b34ea796ce0f938bb509e257516bc6f57@changeid> From: Doug Anderson Date: Mon, 11 Jul 2022 16:22:25 -0700 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v2 3/7] drm/msm: Fix cx collapse issue during recovery To: Akhil P Oommen Cc: freedreno , dri-devel , linux-arm-msm , Rob Clark , Bjorn Andersson , Jonathan Marek , Jordan Crouse , Matthias Kaehlcke , Abhinav Kumar , Chia-I Wu , Daniel Vetter , David Airlie , Dmitry Baryshkov , Konrad Dybcio , Sean Paul , LKML Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-2.7 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, On Fri, Jul 8, 2022 at 11:00 PM Akhil P Oommen wrote: > > There are some hardware logic under CX domain. For a successful > recovery, we should ensure cx headswitch collapses to ensure all the > stale states are cleard out. This is especially true to for a6xx family > where we can GMU co-processor. > > Currently, cx doesn't collapse due to a devlink between gpu and its > smmu. So the *struct gpu device* needs to be runtime suspended to ensure > that the iommu driver removes its vote on cx gdsc. > > Signed-off-by: Akhil P Oommen > --- > > (no changes since v1) > > drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 16 ++++++++++++++-- > drivers/gpu/drm/msm/msm_gpu.c | 2 -- > 2 files changed, 14 insertions(+), 4 deletions(-) > > diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c > index 4d50110..7ed347c 100644 > --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c > +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c > @@ -1278,8 +1278,20 @@ static void a6xx_recover(struct msm_gpu *gpu) > */ > gmu_write(&a6xx_gpu->gmu, REG_A6XX_GMU_GMU_PWR_COL_KEEPALIVE, 0); > > - gpu->funcs->pm_suspend(gpu); > - gpu->funcs->pm_resume(gpu); > + /* > + * Now drop all the pm_runtime usage count to allow cx gdsc to collapse. > + * First drop the usage count from all active submits > + */ > + for (i = gpu->active_submits; i > 0; i--) > + pm_runtime_put(&gpu->pdev->dev); > + > + /* And the final one from recover worker */ > + pm_runtime_put_sync(&gpu->pdev->dev); > + > + for (i = gpu->active_submits; i > 0; i--) > + pm_runtime_get(&gpu->pdev->dev); > + > + pm_runtime_get_sync(&gpu->pdev->dev); In response to v1, Rob suggested pm_runtime_force_suspend/resume(). Those seem like they would work to me, too. Why not use them?