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Wysocki" , Stephen Boyd , Thierry Reding , Viresh Kumar , linux-pm@vger.kernel.org, Vincent Guittot , Krzysztof Kozlowski , devicetree@vger.kernel.org, Dmitry Osipenko , linux-kernel@vger.kernel.org, linux-tegra@vger.kernel.org, Rob Herring Subject: Re: [PATCH V2 00/13] OPP: Add support for multiple clocks* Message-ID: <20220712075240.lsjd42yhcskqlzrh@vireshk-i7> References: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 11-07-22, 18:40, Johan Hovold wrote: > This break OPP parsing on SC8280XP and hence cpufreq and other things: > > [ +0.010890] cpu cpu0: _opp_add_static_v2: opp key field not found > [ +0.000019] cpu cpu0: _of_add_opp_table_v2: Failed to add OPP, -19 > [ +0.000060] cpu cpu0: _opp_is_duplicate: duplicate OPPs detected. Existing: freq: 300000000, volt: 576000, enabled: 1. New: freq: 403200000, volt: 576000, enabled: 1 > [ +0.000030] cpu cpu0: _opp_is_duplicate: duplicate OPPs detected. Existing: freq: 300000000, volt: 576000, enabled: 1. New: freq: 499200000, volt: 576000, enabled: 1 > ... > > I just did a rebase on next-20220708 and hit this. > > I've narrowed it down to _read_rate() now returning -ENODEV since > opp_table->clk_count is zero. > > Similar to what was reported for tegra for v1: > > https://lore.kernel.org/all/58cc8e3c-74d4-e432-8502-299312a1f15e@collabora.com/ > > I don't have time to look at this any more today, but it would we nice > if you could unbreak linux-next. > > Perhaps Bjorn or Mani can help with further details, but this doesn't > look like something that is specific to SC8280XP. It is actually. This is yet another corner case, Tegra had one as well. I have tried to understand the Qcom code / setup to best of my abilities, and the problem as per me is that qcom-cpufreq-hw doesn't provide a clk to the OPP core, which breaks it after the new updates to the OPP core. I believe following will solve it. Can someone please try this ? I will then merge it with the right commit. diff --git a/drivers/opp/core.c b/drivers/opp/core.c index 666e1ebf91d1..4f4a285886fa 100644 --- a/drivers/opp/core.c +++ b/drivers/opp/core.c @@ -1384,6 +1384,20 @@ static struct opp_table *_update_opp_table_clk(struct device *dev, } if (ret == -ENOENT) { + /* + * There are few platforms which don't want the OPP core to + * manage device's clock settings. In such cases neither the + * platform provides the clks explicitly to us, nor the DT + * contains a valid clk entry. The OPP nodes in DT may still + * contain "opp-hz" property though, which we need to parse and + * allow the platform to find an OPP based on freq later on. + * + * This is a simple solution to take care of such corner cases, + * i.e. make the clk_count 1, which lets us allocate space for + * frequency in opp->rates and also parse the entries in DT. + */ + opp_table->clk_count = 1; + dev_dbg(dev, "%s: Couldn't find clock: %d\n", __func__, ret); return opp_table; } -- viresh