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Message-ID: <78824cf6-fe30-239a-db66-63d2ee19c1f0@linaro.org>
Date:   Tue, 12 Jul 2022 10:08:20 +0200
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Subject: Re: [PATCH v1 1/2] dt-bindings: riscv: document the sifive e24
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To:     Conor Dooley <mail@conchuod.ie>,
        Emil Renner Berthing <kernel@esmil.dk>,
        Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Paul Walmsley <paul.walmsley@sifive.com>,
        Palmer Dabbelt <palmer@dabbelt.com>,
        Albert Ou <aou@eecs.berkeley.edu>,
        Anup Patel <anup@brainfault.org>,
        Conor Dooley <conor.dooley@microchip.com>
Cc:     devicetree@vger.kernel.org, linux-riscv@lists.infradead.org,
        linux-kernel@vger.kernel.org
References: <20220711184325.1367393-1-mail@conchuod.ie>
 <20220711184325.1367393-2-mail@conchuod.ie>
From:   Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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On 11/07/2022 20:43, Conor Dooley wrote:
> From: Conor Dooley <conor.dooley@microchip.com>
> 
> The SiFive E24 is a 32 bit monitor core present on the JH7100.
> 
> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>


Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>


Best regards,
Krzysztof